Preprint Article Version 1 This version is not peer-reviewed

Design of a High Performance Low 1/F Noise LDO for Power Management Unit

Version 1 : Received: 22 July 2024 / Approved: 23 July 2024 / Online: 24 July 2024 (07:08:18 CEST)

How to cite: JAVED, A.; Vitale, G.; LIVRERI, P. Design of a High Performance Low 1/F Noise LDO for Power Management Unit. Preprints 2024, 2024071872. https://doi.org/10.20944/preprints202407.1872.v1 JAVED, A.; Vitale, G.; LIVRERI, P. Design of a High Performance Low 1/F Noise LDO for Power Management Unit. Preprints 2024, 2024071872. https://doi.org/10.20944/preprints202407.1872.v1

Abstract

Low dropout (LDO) regulators are widely used in portable electronic devices because they 1 occupy small chip and printed circuit board (PCB) areas. This work presents the design of a low 2 noise low dropout (LDO) linear voltage regulator using folded cascode operational amplifier and 3 source follower buffer for frequency compensation. The proposed design achieves low output noise 4 with feedback loops, which makes it possible to improve load and line regulations as well as the 5 transient response for voltage applications in comparison with the literature. The designed LDO 6 linear regulator works under the input voltage of 2.8-4.8 V and provides up to 100 mA load current 7 for an output voltage of 2.6 V. 8 9 Moreover, the operational amplifier design contributes to the major reduction in the frequency 10 noise, and make sure the stability of LDO under different conditions. Furthermore, the novel LDO 11 design topology has very less dropout voltage, fast transient response and minimized power dissi- 12 pation under maximum load current, worst process corner, and maximum temperature to achieve 13 high power efficiency, maintain output voltage in the presence of fast load changes, and to lower the 14 power loss across the pass element especially at high load. Design criteria are addressed in detail. 15 16 This LDO topology is able to achieve ultra-low noise i.e. 2 /muv/√Hz for frequency >1kHz. The 17 proposed LDO is implemented in the cadence virtuoso H9A with CMOS 130 μm technology

Keywords

Low Dropout Regulator (LDO); folded cascode op-amp; low-noise

Subject

Engineering, Electrical and Electronic Engineering

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