1. Introduction

2. Semiconductor Fundamentals

2.4. Historical Development in Semiconductors

Semiconductors are materials that have electrical conductivity properties that fall between those of conductors and insulators [24]. They are the fundamental building blocks of modern electronics and have enabled the development of a wide range of electronic devices from transistors and integrated circuits to solar cells and light-emitting diodes (LEDs).

The history of semiconductors traces from the Pre-Transistor Era (See Figure 5). According to G. Busch the term “semiconducting” was used for the first time by Alessandro Volta in 1872 [25,26]. The first documented observation of a semiconductor effect is that of Faraday (1833), who noticed that the resistance of silver sulfide decreased with temperature, which was different from the behavior observed in metals [25]. Johann Hittorf published an extensive quantitative analysis of the temperature dependence of the electrical conductivity of Ag₂S and Cu₂S in 1851. The history of semiconductors initially focused on two crucial properties; rectification of metal-semiconductor junctions and sensitivity of semiconductors to light [25].

2.4.1. Rectification

Ferdinand Braun invented the solid-state rectifier in 1874, laying the foundation for solid-state electronics [27,28]. He observed the conduction and rectification in metal sulfides probed with a metal point whisker [25]. Although not immediately appreciated, Braun’s discovery later played a significant role in the development of radio and microwave radar systems during World War II [25]. In 1874, Arthur Schuster also observed rectification in a circuit made of copper wires bound by screws. He discovered copper oxide as a new semiconductor when cleaning the ends of the wires removed the rectification effect. In 1929, Walter Schottky experimentally confirmed the presence of a barrier in a metal-semiconductor junction [25].

2.4.2. Photoconductivity and Photovoltaic

The photovoltaic effect at a junction between a semiconductor and an electrolyte was discovered by Alexander Edmund Becquerel (the father of a great scientist Henri Becquerel) [25,29]. Willoughby Smith discovered photoconductivity in solids in 1873 while working on submarine cable testing [25,29]. Adams and Day were the first to discover the photovoltaic effect in a solid material (selenium) in 1876. They noticed that the presence of light could change the direction of the current flowing through the selenium connected to a battery [25]. Charles Fritts constructed the first working solar cell in 1883, consisting of a metal plate and a thin layer of selenium covered with a very thin layer of gold, with an efficiency below 1% [25,29].

2.4.3. Theory of Semiconductor

In 1878, Edwin Herbert Hall discovered that charge carriers in solids are deflected in a magnetic field (Hall effect), which was later used to study semiconductor properties. Several scientists proposed theories of electron-based conduction in metals shortly after the discovery of the electron by J.J. Thomson. Eduard Riecke’s theory (1899) assumed the presence of both negative and positive charge carriers with different concentrations and mobilities [30,31]. Around 1908, Karl Baedeker observed the dependence of the conductivity of copper iodide on stoichiometry (iodine content) and measured the Hall effect in this material, indicating carriers with positive charge. In 1914, Johan Koenigsberger divided solid-state materials into three groups based on their conductivity: metals, insulators, and "variable conductors". Ferdinand Bloch developed the theory of electrons in lattices in 1928 [25,26].

In 1930, Rudolf Peierls presented the concept of forbidden gaps, which was applied to realistic solids by Brillouin the same year. Kronig and Penney developed a simple, analytical model of periodic potential in 1930. Alan Wilson developed the band theory of solids based on the idea of empty and filled energy bands in 1931. He also confirmed that the conductivity of semiconductors was due to impurities. In the same year, Werner Heisenberg developed the concept of holes [25,32]. Walter Schottky and Neville F. Mott independently developed models of the potential barrier and current flow through a metal-semiconductor junction in 1938. Schottky improved his model the following year, including the presence of space charge. Boris Davydov presented a theory of a copper-oxide rectifier in 1938, including the presence of a p-n junction in the oxide, excess carriers, recombination, and the importance of surface states. Hans Bethe developed the theory of thermionic emission in 1942 [25,33,34].

2.4.4. Devices

2.4.4.1. Point-Contact Rectifiers

J.C. Bose obtained a patent for PbS point-contact rectifiers in 1904. G. Pickard was the first to show that silicon point-contact rectifiers were useful in detecting radio waves (patent in 1906). Selenium and copper oxide rectifiers were developed by E. Presser in 1925 and L.O. Grondahl in 1926, respectively. Selenium rectifiers were heavily used in military communications and radar equipment during World War II [25].

2.4.4.2. The P-N Junction

Russel Ohl realized that the problems with the cat’s whisker detectors were caused by the poor quality of the semiconductor material. He melted silicon in quartz tubes and let it cool down, obtaining polycrystalline material with much more uniform electrical properties. This process helped improve the quality and consistency of silicon detectors. Ohl identified the impurities that created the p-n junction he accidentally obtained during his technological experiments and held four patents on silicon detectors and p-n junctions [25,27].

2.4.4.3. Bipolar Transistor

Lilienfeld invented the concept of the field-effect transistor (FET) in 1926 [27,35,36]. Mervin Kelly at Bell Labs initiated a solid-state device group in 1936 foreseeing the limitations of vacuum tubes [27]. Russell Ohl’s work on silicon crystals in the 1940s led to the understanding of n-type and p-type silicon. [27].

The Transistor Invention era occurred in 1947. John Bardeen and Walter Brattain at Bell Laboratories invented the point-contact semiconductor amplifier (transistor action) which exhibited power gain [27,37,38]. They discovered transistor action while investigating surface states in polycrystalline germanium which is also observed in polycrystalline silicon [27,37]. Shortly after, William Shockley developed the theory of bipolar junction transistor in a creative burst, earning him the title of the father of Silicon Valley. However, Bill Shockley was not a co-patent holder on Bardeen and Brattain’s point-contact semiconductor amplifier patent since Julius Lilienfeld had already received a patent in 1930 for what would have been Shockley’s contribution; namely, the field-effect methodology. Shockley received patents for both his minority-carrier injection concept and junction transistor theory, however, and deservedly shared the Nobel prize with Bardeen and Brattain for his seminal contributions to injection, p-n junction theory, and junction transistor theory [37,39].

In February 1948, John Shive demonstrated a correctly operating point-contact transistor with the emitter and collector placed on opposite sides of a very thin slice of germanium, indicating that conduction was taking place in the bulk [25] (See Figure 6). Point-contact transistors were unstable and had hard-to-control electrical characteristics. The first grown junction transistors were manufactured in 1952, although the production process was challenging. In the same year, the alloyed junction transistor was introduced with a simpler production process. In 1954, the first diffused germanium transistor with a characteristic "mesa" shape was reported, featuring a base width of 1 μm and a cut-off frequency of 500 MHz. That same year, Gordon Teal manufactured the first commercially available silicon devices (grown junction), marking a significant breakthrough for electronics. These transistors could amplify and switch electronic signals, paving the way for the development of modern electronic devices [25,39].

2.4.4.4. Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET)

Julius Lilienfeld obtained patents for devices resembling today’s MESFET (Metal Semiconductor Field-Effect Transistor) and MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) in 1930 and 1933, respectively. Oskar Heil applied for a patent for his theoretical work on capacitive control in field-effect transistors in 1934. A group directed by M.M. Atalla worked on the problem of semiconductor surface passivation and found that a layer of silicon dioxide could be the answer. They developed a new concept of a field-effect transistor and manufactured the actual device [25,40,41].

In 1963, Steven Hofstein and Fredric Heiman published a paper on a silicon MOSFET. In the same year, Frank Wanlass proposed the first CMOS circuit. The development of a poly-Si gate led to a self-aligned MOSFET device, where the gate itself constitutes the mask for source and drain diffusion. Reduction of device size led to short-channel effects, which were addressed by reducing the depth of source and drain, using a lightly doped drain, elevated source/drain, or Schottky barrier source/drain [42].

2.4.4.5. The Integrated Circuit

In 1958, two engineers independently developed the integrated circuit (IC), a revolutionary electronic device that combined multiple transistors and other components on a single semiconductor chip. Jack Kilby at Texas Instruments sketched an oscillator circuit that formed in situ in a semiconductor substrate. He fabricated a working model and several logic circuits in the early fall of 1958 and his invention launched the entire field of modern microelectronics [43,44].

Robert Noyce at Fairchild Semiconductor independently showed how to form interconnected transistors, diodes, resistors, capacitors, and other components on a single piece of silicon in 1958-59. Noyce co-invented the integrated circuit, the electronic heart of every modern computer automobile, cellular telephone, advanced weapon, and video games. He co-founded Fairchild Semiconductor and Intel and earned 16 patents in addition to the IC [45,46,47].

The integrated circuit revolutionized electronics, allowing for tremendous advantages in power consumption, speed, reliability, cost, weight, and size compared to circuits made from discrete components [47]. It launched the semiconductor industry, which has grown to over $250 billion in annual sales [48]. The invention of the integrated circuit is considered one of the most important technological breakthroughs of the 20th century.

2.4.4.6. Semiconductor Laser

Semiconductors are crucial for the emission and detection of radiation. The first known phenomenon of light emission in semiconductor material was in 1907 by H. J. Round, with significant contributions from Losev. Semiconductor lasers were, in principle, invented around 1962 by four American research groups. Subsequent research focused on expanding the range of materials and developing new device structures [25].

Herbert Kroemer and Zhores Alferov independently proposed using heterostructures for semiconductor lasers. Alferov, who contributed to the development of the first soviet p-n junction transistor in the same year 1953, understood the possibility of employing double heterostructures in these devices. He developed the first practical heterostructure laser and, along with Kroemer, was awarded the Nobel Prize in Physics in 2000 for advancements in semiconductor heterostructures. The use of quantum wells and new materials, particularly gallium nitride, has significantly advanced semiconductor laser technology [25].

2.4.5. Advanced Devices

2.4.5.1. Tunnel Diode

In 1957 Leo Esaki designed the first germanium tunnel diode, then a silicon tunnel diode in 1958 revealing electron tunneling in heavily doped p-n junctions (Figure 7). Esaki was awarded the Nobel Prize in Physics in 1973 for his work, though Robert Noyce also claimed to have conceived the idea [48,49]. The materials used for this diode are Germanium, Gallium arsenide, and other silicon materials.

Tunneling behavior stems from the tunneling effect which involves the movement of electrons through a thin depletion layer region (Figure 7). In an unbiased tunnel diode, the conduction band of the n-region is coaxial with the valence band of the p-region thereby making it possible for electrons to tunnel in the absence of any voltage and thus making the flow of charge carriers balanced (Figure 7). When a small forward voltage is used, electrons in the n-region move in the p-region resulting in a forward current. As the voltage increases, the overlap between the bands grows, peaking at a certain point (Ip). Beyond this voltage, the current decreases, creating a region of negative resistance (See Figure 7). The tunnel diode, known for its negative resistance due to quantum mechanical tunneling, operates at high speeds and is used in oscillators, amplifiers, and radio frequency (RF) applications [50].

Recent research explores its use in terahertz frequency devices and superconducting spintronic devices, highlighting its versatility and significance in modern electronics [51,52].

2.4.5.2. Silicon-on-Insulator (SOI) MOSFET

Silicon-on-insulator (SOI) MOSFETs offer advantages such as reduced parasitic capacitances, improved device isolation, and reduced short-channel effects due to their structure of a thin silicon layer atop an insulating silicon dioxide (SiO2) layer. Some of the issues that were discovered that limit their use include the deterioration of carrier mobility and the floating body effects. Various extensions and modifications have been proposed to rectify these challenges [53,54,55,56,57].

Quasi-SOI MOSFETs (Figure 8) are a further improvement of SOI MOSFETs which incorporate the features of both SOI and bulk devices. In this structure, the source/drain regions are partially surrounded by an insulator, and the channel is connected to the bulk substrate. This design minimizes the short-channel effects, parasitic capacitances, and self-heating while maintaining effective heat dissipation. Quasi-SOI MOSFETs can be fabricated using epitaxial technology and thermal oxidation, and simulations show they have good scaling capability and can achieve high cut-off frequencies, up to 220 GHz for NMOS and 130 GHz for PMOS (P-type Metal-Oxide Semiconductor) at a 20 nm effective channel length. [53,56].

Localized-SOI MOSFETs (Figure 8) include two variants: quasi-SOI MOSFETs and source-drain-on-nothing (SDON)/source-drain-on-insulator (SDOI) MOSFETs. The quasi-SOI structure is analogous to previously described designs, and the SDON/SDOI devices have recessed source/drain regions on partially buried layers. These structures maintain the advantages of quasi-SOI MOSFETs, such as reduced short-channel effects and parasitic capacitances, and are more compatible with standard CMOS (Complementary Metal-Oxide Semiconductor) fabrication processes, making them suitable for highly scaled devices [56].

DSSB, Dopant-segregated Schottky Barrier SOI MOSFETs (Figure 8) utilize the properties of both SOI and Schottky barrier devices, which include incorporating a thin layer of heavily doped material in the source-to-channel interface. This decreases the Schottky barrier height and increases on-state improvement. DSSB SOI MOSFETs have features like low short-channel effects (SCE), high scalability, and better analog/RF characteristics. However, optimizing the segregation layer density and length is crucial to balance trade-offs between leakage current, drive current, and variability [58,59,60].

Figure 8. (a) Quasi-SOI MOSFET cross-sectional diagram [61]. A conventional bulk MOSFET with a lightly doped substrate. The substrate acts as a quasi-insulator, providing some isolation but not as effective as a full SOI structure. (b) Localized-SOI MOSFET cross-sectional diagram [62]. A SOI structure where the silicon layer is partially removed to create a localized island. This improves device performance by reducing parasitic capacitances. (C) Dopant-segregated Schottky barrier SOI MOSFET cross-sectional diagram [63]. A SOI MOSFET with a Schottky barrier at the source and drain junctions. Dopants are segregated to optimize the Schottky barrier height.

Figure 8. (a) Quasi-SOI MOSFET cross-sectional diagram [61]. A conventional bulk MOSFET with a lightly doped substrate. The substrate acts as a quasi-insulator, providing some isolation but not as effective as a full SOI structure. (b) Localized-SOI MOSFET cross-sectional diagram [62]. A SOI structure where the silicon layer is partially removed to create a localized island. This improves device performance by reducing parasitic capacitances. (C) Dopant-segregated Schottky barrier SOI MOSFET cross-sectional diagram [63]. A SOI MOSFET with a Schottky barrier at the source and drain junctions. Dopants are segregated to optimize the Schottky barrier height.

2.4.5.2. Multigate Transistors

Advanced structures of transistors, Multigate transistors, which include double gate, FinFET, and surrounding gate structures, significantly improve the electrostatic control and mitigate short-channel effects in metal-oxide-semiconductor field-effect transistors (MOSFETs). These devices, by employing multiple gates, enhance the control of the electric field within the channel, key for scaling down. FinFETs, with their three-dimensional structure and vertically positioned fins, possess better gate control compared to planar devices. Moreover, the double gate transistors lessen the short channel effects like Drain-Induced Barrier Lowering (DIBL), achieve better ON/OFF current ratios, and reduced subthreshold swings which are effective features in low-power devices [64,65,66,67,68,69].

Double Gate Transistors; These are the devices that have two gates (Figure 9) to control the channel so that the channel can be independently biased, hence better electrostatic control. This configuration may improve the overall performance of both analog and digital applications, as confirmed and shown in various simulations [70,71].

Fin Field-Effect Transistor (FinFET); FinFET technology is proven as a promising solution for sub-22 nm technology nodes. The FinFET’s three-dimensional structure (Figure 9) allows for a significant decrease in short-channel effects while achieving high drive currents. Research highlights that FinFETs are capable of providing superior electrical performance, making them ideal for high-frequency applications [66,72].

Gate-All-Around Transistor / Surrounding Gate Structures; These structures, such as Gate-All-Around (GAA) transistors, offer even better control compared to FinFETs by surrounding the channel on all sides (Figure 9). This design minimizes short-channel effects (SCE) and allows for further scaling of device dimensions without significant performance degradation [65,73].

3.4. Organic Semiconductors

Organic semiconductors, primarily composed of carbon-hydrogen bonds, exhibit semiconductor behavior and can be doped to create N- and P-type materials, enabling the construction of devices like organic light-emitting diodes (OLEDs), organic field-effect transistors (OFETs), and organic solar cells [137]. These materials are made up of π-bonded molecules or polymers, often including heteroatoms like nitrogen, sulfur, and oxygen, and can exist as molecular crystals or amorphous thin films (Figure 12). They typically behave as insulators but become semiconducting upon charge injection, doping, or photoexcitation. They hold a large bandgap and a low dielectric constant [138].

The carrier mobility of organic semiconductors is influenced by factors such as energy, morphology, and solvent choice, impacting crystallinity and molecular ordering. Techniques like cyclic voltammetry and ultraviolet electron spectroscopy are essential for understanding charge transport mechanisms [139]. Single-crystal organic semiconductors are recognized as central to high-performance devices attributed to unique optoelectronic properties because of weak van der Waals interactions [140]. Hyperbranched polymers (HBPs) are also notable for regulating charge transport and film morphology [141].

Figure 12. Organic Semiconductors; (a) Molecular structures of the organic semiconductors for the inverted OLEDs; (b) scheme of the inverted OLEDs; and (c) the energy levels of the materials involved in the inverted OLEDs [142].

Figure 12. Organic Semiconductors; (a) Molecular structures of the organic semiconductors for the inverted OLEDs; (b) scheme of the inverted OLEDs; and (c) the energy levels of the materials involved in the inverted OLEDs [142].

Techniques to fabricate organic semiconductors include vacuum deposition, solution processing, and self-assembly, with methods such as spin-coating and inkjet printing enabling the realization of flexible/wearable electronics [143]. Applications include OLEDs, organic photovoltaic cells, OFETs, and biosensing devices. Organic semiconductors have some very attractive features associated with them, relating to mechanical flexibility, low cost, and ease of fabrication that make them very attractive in a wide range of electronic and optoelectronic applications [138].

3.5. Perovskite Semiconductors

Perovskite semiconductors, with their remarkable optoelectronic properties and versatile applications, have emerged as a promising class of materials, particularly in photovoltaics and other optoelectronic devices [144]. Characterized by a general formula of ABX₃, with A and B as cations and X as an anion, usually a halide or oxygen, these materials have high optical absorption, high carrier mobility, long diffusion lengths, and unique ambipolar charge transport properties [145,146].

Perovskite solar cells have seen rapid advancements, achieving power conversion efficiencies exceeding 25% in just over a decade [147]. Their excellent photophysical properties and solution-processability have also led to applications in light-emitting diodes, photodetectors, lasers, and X-ray scintillators [147]. The ability to tailor perovskite properties by manipulating their crystal structure, size, and composition has further enhanced their functionalities, making them valuable in applications like photocatalysis and radiation detection [148]. In the domain of radiation detectors, lead halide perovskites like CsPbBr₃ demonstrated high efficiency in X-ray and gamma-ray detection and thus can be an important material for imaging applications [149].

Figure 13. Perovskite Semiconductors; (a) The evolution of the efficiency of perovskite solar cells (PSCs) from 2008 to 2020 [150]. (b) Chronological evolution of the PCE of perovskite solar cells (PSCs), C-PSCs, and FPSCs and a brief history of schematics for fabrication strategies and device architectures in PSCs (HTL: hole-transport layer, ETL: electron-transport layer, TCO: transparent conductive oxides, PV: photovoltaic) [151].

Figure 13. Perovskite Semiconductors; (a) The evolution of the efficiency of perovskite solar cells (PSCs) from 2008 to 2020 [150]. (b) Chronological evolution of the PCE of perovskite solar cells (PSCs), C-PSCs, and FPSCs and a brief history of schematics for fabrication strategies and device architectures in PSCs (HTL: hole-transport layer, ETL: electron-transport layer, TCO: transparent conductive oxides, PV: photovoltaic) [151].

Despite their rapid progress, perovskites face challenges in stability, reproducibility, and toxicity. Issues such as ionic transport can introduce defects and degrade performance, necessitating strategies to mitigate these challenges [152]. Understanding the fundamental chemistry and physics of perovskites is essential for addressing these issues and guiding future developments [144].

Environmental concerns have heightened interest in finding alternatives to lead-based perovskites. Research is still focused on developing the stability, efficiency, and scalability of perovskite-based technologies. The incorporation of PbS quantum dots into perovskite matrices, for instance, enables sub-bandgap photocurrent generation; this could fundamentally open up prospects for overcoming traditional efficiency limits in solar cells [153]. As the field progresses, the development of stable, high-performance perovskite devices holds great promise for revolutionizing optoelectronics and renewable energy technologies.

3.7. Porous Semiconductors

Porous semiconductors have garnered significant research attention attributed to their unique properties due to their porous structure (Figure 14) and potential applications. Some key properties include increased surface area [159,160], quantum confinement effects, reduced thermal conductivity [161], improved luminescence [159] and enhanced photoconductivity, second harmonic generation, and THz emission [159]. Studies have focused on creating controlled porous structures in various semiconductor compounds, leading to advancements in fields such as optoelectronics and photocatalysis [162,163,164,165]. These porous materials exhibit diverse morphologies and topologies, impacting their physical characteristics like luminescence, optical properties, and hydrophobicity or hydrophilicity. The use of porous silicon as a template for filling with other materials has shown promise in altering its electrophysical parameters, making it versatile for display technologies. Additionally, the incorporation of halogens into organic porous semiconductors has been explored for enhancing photocatalytic performance, highlighting the importance of composition and electronic nature in achieving efficient energy conversion.

Porous semiconductors are typically fabricated by electrochemical etching techniques (Figure 14). For example, microporous silicon can easily be produced by running current through a silicon anode in an electrochemical cell under the right conditions [161]. Other semiconductors like II-Vs, II-Vis, and SiC can also be made porous using similar electrochemical dissolution methods [159].

Porous semiconductors have a wide variety of potential applications, including energy storage [161], optoelectronics [159,160], sensing [160], and thermoelectric [161]. Porous (metal)-organic semiconductors are being explored as alternatives to silicon with tunable structures for various applications [166]. However, most porous semiconductor applications are still at the research stage and not yet commercialized [161]. Ongoing research aims to further understand and optimize their unique properties for practical applications.

Figure 14. Si "nanowires" made via electrochemical pore etching [161].

Figure 14. Si "nanowires" made via electrochemical pore etching [161].

4.0. Semiconductor Manufacturing and Emerging Technologies

4.1. Semiconductor Manufacturing Process

4.1.1. Wafer Fabrication

The foundation of semiconductor devices begins with wafer fabrication. First, a single crystal ingot like pure silicon is pulled and sliced into thin wafers. The wafers are polished to create a smooth surface. To analyze the defects such as stress fields in the crystal lattice, the wafer undergoes thermal treatments in which a radial temperature gradient acts on the wafer. This preparation is important because even minor defects will result in flaws in the final product. The wafers serve as the substrate for subsequent processing steps [171,172].

4.1.2. Doping

Doping is an essential process in semiconductor processing/manufacturing since it defines the electronic features of this material. Several methods are implemented to introduce impurities into semiconductor materials. These processes can change the resistivity, mobility, energy band gap, and light absorption coefficients [173]. Doping refers to introducing certain impurities into the wafer to alter its electrical properties. It can be done through a process of thermal diffusion or by ion implantation. Doping allows the creation of n-type and p-type semiconductors; this aspect is very important in forming p-n junctions that are basic to transistor operations [174].

Figure 15. Semiconductor Manufacturing Process Flowchart [175].

Figure 15. Semiconductor Manufacturing Process Flowchart [175].

4.1.3. Thermal Oxidation

The thermal oxidation step in semiconductor manufacturing processes is a fundamental process for the creation of silicon dioxide layers on silicon wafers; these are integral components in most electronic devices [176,177]. This process helps in creating gate dielectrics, which are vital for the proper functioning of transistors and other semiconductor devices [177]. Optimized gas flow rate, oxidation time, and temperature in the thermal oxidation process guarantee that high-quality oxide layers are formed with the necessary thickness, which relates to semiconductor device performance and reliability [176]. Besides, it aids in reducing stress on wafers, enhances IC yield, and improves the quality of semiconductor products as a whole [178,179]. The precise control and optimization of the thermal oxidation process are essential for achieving high-quality semiconductor devices with optimal performance characteristics [180]. Thermal oxidation essentially involves the step of heating semiconductors on silicon wafers in an environment rich in oxygen at temperatures usually within the range of 800°C to 1200°C (Figure 16). It is within this temperature limit that the oxygen molecules diffuse into the silicon substrate and react to form silicon dioxide. There are two major techniques of thermal oxidation: Dry Oxidation and Wet Oxidation. Dry oxidation uses pure oxygen, and the oxide layer is thinner with higher quality (Si + O₂ → SiO₂).

They are characterized by slow growth, high density, and high breakdown voltage. Wet oxidation involves the use of steam, which may grow thicker oxide layers more quickly but of lesser quality compared with dry oxidation. Fast growth even at low temperatures is their characteristic feature and they permit thicker oxides [181].

Figure 16. Thermal Oxidation Schematic Drawing [182].

Figure 16. Thermal Oxidation Schematic Drawing [182].

4.1.4. Lithography

Lithography is one of the most important patterning techniques in defining the geometric shapes of semiconductor devices on a substrate. After preparing the wafer, its surface is coated with a photoresist, a light-sensitive material that changes the chemical properties of the wafer to make it suitable for circuit printing [183]. There are two main types of photoresists based on their ultraviolet light (UV) reactivity: positive and negative. The positive photoresist becomes soluble upon exposure to UV light, and the exposed resist gets dissolved, leaving the unexposed resist remaining. On the other side, negative photoresists harden when exposed to UV light. Positive photoresist is more widely applied in the semiconductor manufacturing process due to its better thermal stability and resolution capability (Figure 17) [171].

The various steps in the photolithography process include the application of a layer of photoresist, coating with an adhesion promoter, pre and post-baking, light exposure, and finally the development of the exposed material. A photosensitive substance known as "photoresist" is applied to the wafer. Afterward, the photoresist-coated wafer is pre-baked from 90 to 120°C to fix the binding of the photoresist and evaporate the extra photoresist solvent. Then the photoresist is exposed to a pattern of intense light following the prebake. In optical lithography, UV light is commonly used. A post-exposure bake is conducted at 60 - 120°C to fix the pattern before development. There is then applied a developer to the photoresist layer. The substance can be such that it is able to dissolve either the irradiated or non-irradiated photoresist [184].

Photolithography refers to the process of drawing a circuit design onto a wafer. This is the step where the wafer is introduced to the photolithographic equipment and exposed to UV light. This light draws the pattern from the mask, containing the blueprint of the circuit, onto the wafer coated with a photoresist film. Using light, photolithography transfers a geometric pattern from a photomask onto the photoresist applied to a substrate. Variants of lithography include e-beam lithography, which uses a focused beam of electrons to create extremely fine patterns for small-scale devices, and extreme ultraviolet lithography (EUV), which uses EUV light to achieve smaller feature sizes essential for advanced semiconductor nodes. Refraction and defects can occur in the lithography process, which is why robust quality control is necessary. This is a critical step in defining the layout of electronic components, as well as creating complex patterns on the surface of the wafer [171,185].

4.1.5. Etching

After printing the circuit diagram on the wafer through lithography, the etching process follows to remove excess materials from the surface, creating the desired patterns (Figure 17). The two main primary types of etching include wet and dry etching. Wet etching involves chemical solutions that mostly dissolve material equally in all directions and are less precise. Dry etching, also known as plasma etching, uses ionized gases to remove the material and thus provides better resolution and anisotropy, which results in highly defined structures [171,172,185].

Emerging techniques like atomic layer etching (ALE) and cryogenic etching are critical in advanced semiconductor manufacturing. ALE provides atomic-level precision by alternating between etching and passivation steps, while cryogenic etching, performed at very low temperatures, enables the creation of high-aspect-ratio features with smooth sidewalls. These methods are of vital importance in advanced semiconductor devices. Semiconductors often require repeating the photolithography and etching processes several times on all layers of the wafer to achieve the final product; hence, precision is required, and close process control is necessary to prevent damage to the chip structure. Various methods in semiconductor processing, such as using atomized droplets with etching solutions at high temperatures, curing photoresists to reduce consumption, conducting multiple etch cycles with gas and purge gas introductions, and employing specific gas mixtures for plasma processing, aim to achieve precise and controlled material removal, enhancing efficiency and reducing costs [186,187].

Figure 17. The lithography and etching process [188].

Figure 17. The lithography and etching process [188].

4.1.6. Deposition

Deposition involves adding thin films of materials onto the semiconductor substrate to form layers necessary for device functionality. Various techniques are used in this process including Chemical Vapor Deposition (CVD), Physical Vapor Deposition (PVD) and Atomic Layer Deposition. In chemical vapor deposition, chemical reactions in a vapor phase deposit materials onto the substrate. Variants of CVD include low-pressure CVD (LPCVD) and plasma-enhanced CVD (PECVD). Physical vapor deposition (PVD), which involves physical processes like sputtering or evaporation, is widely used for depositing metals. Another method, atomic layer deposition (ALD), deposits materials one atomic layer at a time, providing excellent control over thickness and uniformity. These deposited films serve multiple purposes, such as forming insulating layers, conducting paths, or active components like transistors [171,172,185].

4.1.7. Assembly and Packaging

The entire semiconductor manufacturing process (Figure 18) may take as long as 26 weeks from design to production. The last stage of the production process entails separating the wafer into individual chips (dicing) and placing the chips onto a substrate through bonding [190]. The key purposes of chip packaging focus on protecting individual chips from mechanical damage, providing a barrier against water and chemical impurities, ensuring the existence of strong links between each chip and an electrical circuit through the use of strong leads, and providing the means for chips to lose heat during its operation. Materials like plastic and ceramic are used to apply protective layers that encapsulate the chip, thereby preventing electric circuits from scoring or heat punctures [191]. After this process, the chip is ready for use.

The process of semiconductor manufacturing involves other steps, like testing and inspecting chips. Among the most common problems that create issues for manufacturers are:

Product Quality; The difficulty in ensuring quality products can arise as semiconductor products become more sophisticated and their demand increases. Defects; There are several steps from assembling to testing that can lead to defects in the products. These defects can hardly be noticed considering the size of each chip and the number of its layers. Cost; The cost associated with the semiconductor manufacturing process continues to rise, with new technologies coming out and shortages occurring that make it harder for manufacturers to break even in revenue. Equipment; Advances within the industry will require manufacturers to keep pace with new equipment and technologies, which can be a struggle and an added cost. Time; Even minor production faults render hundreds of chips useless, and there is almost always a challenge of minimizing the downtime in case of quality compromise and delay [171].

Figure 18. A comprehensive overview of the semiconductor fabrication process, detailing the steps from materials supply and wafer fabrication to testing and integration. The diagram highlights the critical role of metrology in ensuring quality and precision at each stage, from design through to end products utilized across various sectors of the economy [189].

Figure 18. A comprehensive overview of the semiconductor fabrication process, detailing the steps from materials supply and wafer fabrication to testing and integration. The diagram highlights the critical role of metrology in ensuring quality and precision at each stage, from design through to end products utilized across various sectors of the economy [189].

5.0. Innovation and Future Prospect

6.0. Opportunity and Areas of Expansion

Healthcare is increasingly being driven by semiconductor technology that is powering medical devices, diagnostics tools, and telehealth solutions. Increased patient monitoring, data collection, and analysis within healthcare devices pertaining to the domains of AI and IoT open new fields of device application and correlated semiconductors. This trend supports the market growth of semiconductors in healthcare delivery improvement and better patient outcomes [212,213].

Figure 19. (a) Projected Global Semiconductor Market Size from 2023 to 2033 (USD Billion). The market is expected to grow from $544.78 billion in 2023 to $1,137.57 billion in 2033. (b) Projected Semiconductor Market Size in the Asia Pacific Region from 2023 to 2033 (USD Billion). The market is anticipated to increase from $287.79 billion in 2023 to $611.73 billion in 2033. (c) Semiconductor Market Share by Region in 2023 (%). The Asia Pacific region leads with 52.8%, followed by North America (22.7%), Europe (15.8%), Latin America (4.5%), and the Middle East & Africa (4.1%). (d) Semiconductor Market Share by Application in 2023 (%). The largest share is held by Networking & Communications (29.2%), followed by Data Processing (23.6%), Consumer Electronics (17.1%), Industrial (13.6%), Automotive (11.3%), and Government (5.2%) [213].

Figure 19. (a) Projected Global Semiconductor Market Size from 2023 to 2033 (USD Billion). The market is expected to grow from $544.78 billion in 2023 to $1,137.57 billion in 2033. (b) Projected Semiconductor Market Size in the Asia Pacific Region from 2023 to 2033 (USD Billion). The market is anticipated to increase from $287.79 billion in 2023 to $611.73 billion in 2033. (c) Semiconductor Market Share by Region in 2023 (%). The Asia Pacific region leads with 52.8%, followed by North America (22.7%), Europe (15.8%), Latin America (4.5%), and the Middle East & Africa (4.1%). (d) Semiconductor Market Share by Application in 2023 (%). The largest share is held by Networking & Communications (29.2%), followed by Data Processing (23.6%), Consumer Electronics (17.1%), Industrial (13.6%), Automotive (11.3%), and Government (5.2%) [213].

7.0. Sustainability and SDG Alignment

Sustainable practices in related sectors, such as construction, also align with multiple SDGs, including SDG 7, SDG 9 (Industry, Innovation, and Infrastructure), and SDG 11 (Sustainable Cities and Communities) [224]. However, there is a need for increased collaboration between academia and industry to amplify the impact of semiconductor innovations on the SDGs [217]. Semiconductor companies are actively working towards reducing energy consumption and waste through initiatives like developing low-power chips and utilizing recyclable materials, thus contributing to SDG targets such as affordable and clean energy, responsible consumption, and industry innovation. This focus on energy efficiency, waste reduction, and eco-friendly materials reflects a broader trend across industries towards sustainable practices, emphasizing the importance of technological advancements in achieving environmental and social objectives. Additionally, the engagement of multinational corporations (MNCs) in sustainable development programs further underscores the significance of semiconductor companies’ efforts in addressing global challenges and promoting positive externalities [216].

Figure 20. (a) Number of semiconductor-related publications from 2017 to 2022 by SDG program. (b) Number of SDG-related publications on semiconductors per year from 2017 to 2022. (c) Countries contributing to SDG 7-related publications from 2017 -2022 [217].

Figure 20. (a) Number of semiconductor-related publications from 2017 to 2022 by SDG program. (b) Number of SDG-related publications on semiconductors per year from 2017 to 2022. (c) Countries contributing to SDG 7-related publications from 2017 -2022 [217].

8.0. Conclusions

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