Version 1
: Received: 20 September 2024 / Approved: 22 September 2024 / Online: 24 September 2024 (03:49:56 CEST)
How to cite:
Nti Darko, E.; Bruce, I.; Oko-Odion, E.; Bhatheja, K.; Karimpour, S.; Chen, D. A Low-Cost Direct Digital Synthesis Based On-Chip Waveform Generation for Analog/Mixed Signal BIST Applications. Preprints2024, 2024091716. https://doi.org/10.20944/preprints202409.1716.v1
Nti Darko, E.; Bruce, I.; Oko-Odion, E.; Bhatheja, K.; Karimpour, S.; Chen, D. A Low-Cost Direct Digital Synthesis Based On-Chip Waveform Generation for Analog/Mixed Signal BIST Applications. Preprints 2024, 2024091716. https://doi.org/10.20944/preprints202409.1716.v1
Nti Darko, E.; Bruce, I.; Oko-Odion, E.; Bhatheja, K.; Karimpour, S.; Chen, D. A Low-Cost Direct Digital Synthesis Based On-Chip Waveform Generation for Analog/Mixed Signal BIST Applications. Preprints2024, 2024091716. https://doi.org/10.20944/preprints202409.1716.v1
APA Style
Nti Darko, E., Bruce, I., Oko-Odion, E., Bhatheja, K., Karimpour, S., & Chen, D. (2024). A Low-Cost Direct Digital Synthesis Based On-Chip Waveform Generation for Analog/Mixed Signal BIST Applications. Preprints. https://doi.org/10.20944/preprints202409.1716.v1
Chicago/Turabian Style
Nti Darko, E., Saeid Karimpour and Degang Chen. 2024 "A Low-Cost Direct Digital Synthesis Based On-Chip Waveform Generation for Analog/Mixed Signal BIST Applications" Preprints. https://doi.org/10.20944/preprints202409.1716.v1
Abstract
Waveform generation as part of an on-chip built-in self-test (BIST) circuitry often necessitates sufficient linearity without expensive hardware overhead. Achieving high linearity is critical for accurate signal generation, especially in applications requiring high precision, such as biomedical and instrumentation. Currently, achieving the high linearity and precision required in signal generators often relies on costly hardware such as automated test equipment (ATE). This paper presents a DAC based hardware synthesizable arbitrary waveform generator. We use a low-cost DAC and a fully digital on-chip testing and calibration approach to nullify the effect of the DAC’s non-linearity on the generated waveform. The ultra-low cost and high linearity benefit of the proposed waveform generator makes it highly suitable for integration into resource-constrained systems. The proposed approach is validated using simulation results of the small-area DAC designed in TSMC 0.18um technology and the testing and calibration algorithms implemented in MATLAB. The DAC, designed with a matching accuracy at only the 5-bit level, is able to generate a signal with an ENOB of 12 bits alongside a SFDR and THD surpassing 100 dB. This high level of signal purity is consistently maintained across 100 Monte-Carlo simulations, demonstrating the robustness of the architecture against PVT variations as well as random mismatches.
Engineering, Electrical and Electronic Engineering
Copyright:
This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
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