ARTICLE
|
doi:10.20944/preprints202310.0958.v1
Subject:
Engineering,
Electrical And Electronic Engineering
Keywords:
gate-all-around; nanosheet; silicon-on-insulator; vertically stacked; parasitic channel; short-channel effect; current densities; gate capacitances; transconductance; cut-off frequency; 3dB frequency; power consumption; 3-D device simulation
Online: 16 October 2023 (09:53:47 CEST)