Inverter Design in Low Loss by Using Ultrasonic PWM

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Inverter Design in Low Loss by Using Ultrasonic PWM

This version is not peer-reviewed.

Muhammed Hussein Baqir^*,

Nor Mohd Haziq Norsahperi^*,

Noor Izzri Abdul Wahab^*

Muhammed Hussein Baqir^*,

Nor Mohd Haziq Norsahperi^*,

Noor Izzri Abdul Wahab^*

This version is not peer-reviewed.

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Submitted:

21 January 2023

Posted:

28 January 2023

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Abstract

To build a stable power factor and high output accuracy, it should use balanced active and reactive power, also used ultrasonic PWM was used with the frequencies (20–500 kHz). I also used a three-phase dynamic load at the output system and was connected to the compound splicing (CS) system this is a novelty. An oscillator circuit with 4Ghz as a microcontroller is a novelty, and designing ADC is utilized to increase accuracy, as well as contribute to the reduction of loss brought on by the characteristics of voltage source inverters (VSI), such as dead time determined by the excess voltage or voltage drop in the inverter, circumstances abnormal to the load current, such as short circuit current in the production phase, and so forth. The innovation relates to the inverter's load sensing circuit, current smoothing during operation, reaction, spontaneous power factor enhancement of the inverter, and correction of reactive power of passive devices. This invention contributes to the advancement of D.C to A.C power converter by the achievement of extremely low losses, excellent precision, and lightweight construction. Additionally, the accuracy ranges from 99%, and the total harmonic distortion (THD) of the voltage and current is (0.1%-0.8%). We Power MOSFET are used, along with FPGA to improve control over the creation of ultrasonic PWM signals, the programmable peripheral interface (PPI) 8255A for regulatory work. The marks serve as proof of this.

Keywords:

Subject:

Engineering - Electrical and Electronic Engineering

1. Introduction

At this time, and we are in 2022, it has become obligatory to use provide high energy through the use of the switching frequency to reduce losses and increase accuracy, also through very fast switching frequency of turn-on and turn-off status. Therefore, the losses that occur in a MOSFET include studying the parasitic capacitance and the inductance. Consequently, must be taking into account the efficiency of the power electronic device, and the suggestions that show that most of the losses occur due to the plateau gate voltage and gate drive must be taken. From here, we start the process of changing and developing the work of an inverter. The MOSFETs have the characteristics of high accuracy and a few losses. Thereby, this is what distinguishes it from the other transistors, it features high gain current with high-frequency ability by switching process, It also has the advantages of linearity operation and more thermal stability through the switching of transitions, and is easily used on parallel because of the positive resistance factor [1,2,3]. Ultrasonic PWM makes to reduces the losses and increases accuracy in the inverter by syncretizing with increasing input voltage (

V i n

) and reducing the gate charge (QG) and thus reducing the gate resistance (RG). As well as, reducing parasitic capacitance (Cs), so that efficiency, accuracy, and low loss are achieved by other components such as using FPGA, PPI 8255A, and ADC, that will be used in this research.

1.1. Literature Review And Problem Statement

These papers (Bale et al; 2018) include improving the quality factor of the losses by distributing the energy inside a cavity it is used on the non-periodic matter with a frequency depth of 9.365GHz, as the obtained results were acceptable, noting that many researchers have researched similar to this work. The paper (Chen et al; 2019) proposal is to prevent the flux to the oscillator circuit by using an LC external circuit, that can be directly driven by a D.C transformer, the oscillating waves were not accurate because the ripple is not sufficient to prepare the oscillator circuit, in addition to the repetition process, there are successive distortions, and therefore we need continuity of work to obtain accuracy and few losses. The proposal is acceptable, but it needs minor changes to achieve work efficiency. In these papers (Gao, J., & Altintas, Y. 2019) it is proposed to use ultrasonic vibrations for cutting operations by controlling the resonance frequencies, that the cutting tests are not less than 30% efficient compared to drilling and milling operations. We believe that cutting operations need very high frequencies that exceed drilling operations and therefore need high voltages to create a condition of high-efficiency resonant synchronization. These papers (Gutierrez et al; 2018) it is proposed to study oscillators based on parity with a pulse generator where the proposal was to use an ADC and built on a VCO, it was proposed to improve the functioning o digital devices using a multi-stage modulator and built on a VCO-DAC, with an extended trance. The papers (Hertel, et al; 2016) The design for a 9-W class E resonant power converter in a 0.18-m CMOS technology is presented in this study. An extensive mathematical analysis of the self-oscillating gate drive that powers the converter is provided. To accomplish the proper phase shift necessary for zero voltage switching. The necessary spiral inductors were designed, and simulations at a switching frequency of 250 MHz show Q values as high as 14. A self-oscillating gate drive gives the converter an efficiency of 55%, according to simulations. The modeled inductor, however, presented problems when used with these.

2. Material and Method

One factor to improve output in this research is the use of ultrasonic PWM from (20

-

500kHz) by using FPGA, which relied on the extent of voltage and the frequency from the sign utilized at the ultrasonic transducers, this is a novelty in this project, note that the FPGA is responsible for generating the signal with high accuracy. The choice of the frequency demand relies on the sort and the standard of required PWM [4]. Ultrasonic PWM is defined as the voice waves which set frequencies behind the domain of a person's hearing [5]. The chief standard in utilizing ultrasonic PWM is to ensure safe, to get high accuracy of the output power level, reduce the harmonic distortions (Low losses), and be more economical than the use of high frequency in an inverter, as well as used in the motor constant torque with speed variety by control of the amplitude of voltage and frequency to make to reduce torque pulsation in power switching.

The PWM effort can become rise till to undesired impact of the signals (harmonic distortion). The PWM efficiency and accuracy may be reductions occur if the used force is growing more than required without considering to components that may be used in the inverter. It can be concluded from the above paragraphs that controlling frequency, voltage, and power, as constant-time operation of the switching, have vital importance in designing ultrasonic PWM [6,7], with a high accuracy level on output and low losses through a design inverter. The proposal in this research is to use ultrasonic waves (UPWM) from (20 -500KHz) with the use of the positive phase sequence connected to compound splicing (CS) to improve the output with high accuracy and low losses, and control generation of UPWM by FPGA through field-oriented control (FOC).

Pulse is maximum generally used through actions about a pulse generator circuit to provide integrally the system of high accuracy ultrasonic PWM generators. As well as, an oscillator circuit used as a microcontroller with 4GHz is a novelty. in this study, an ultrasonic PWM generator system is designed by using an FPGA technology controller see Figure 1. The FPGA board is accountable for the reproduction of eight PWM digital signals into the lead for autonomous force operator collective programmable peripheral interface (PPI) type 8255A.

The hardware of this research includes digitally-controlled frequency and power units together by using an oscillator circuit proposed to control all the systems with the 4GHz.This proposed frequency has great benefits, including not to need use protection circuits from overcurrent and overvoltage that are excessive that cause surges that lead to damage to the device. As well as, reducing the size of the designed system.

The digital PWM signals obtained from FPGA implementation can securely and more reliably supply power to the MOSFETs in an inverter through the section for the ultrasonic PWM unit. The technical method used in an inverter changes the D.C. voltage to high-frequency waves through oscillator circuit control. Each three-phase transducer in the inverter has three ultrasonic transducers that have the same resonant frequency of nearly 100kHz. [8,9].

The remarkable thing is that every ultrasonic PWM can generate different frequencies, different powers, and at separate levels [10]. Therefore, when designing, we can use only one unit of FPGA, which is based on a field-oriented control (FOC). Transistors provide power conversion at ultrasonic frequencies greater than (20 kHz). If allowed develop DC/AC converters with higher accuracy or efficiency, higher power density, lower output voltage distortion, and lower spurious sign standards in the audio frequency group. The accuracy of the output voltage waveform would be better when the value of the frequency ratio is very large since the unwanted harmonics in the output waveform move to the higher frequency region. The ultrasonically-modulated inverters offer several technical and economic advantages compared with PWM inverters which are switched at frequencies of a few kHz, while the carrier frequencies of ultrasonic PWM are in the large of 20 kHz to 100 kHz. As well as, there are advantages to this high frequency which are: (1) Very low harmonic distortion in the PWM synthesized waveform, (2) minimal acoustic noise in an inverter resulting in quiet operation, and (3) A simplified modulator system can be used with the fixed carrier frequency. See Figure 1 and Figure 2.

The second reason to improve production is to use compound splicing (CS) The foundation of the inverter's designed output filter is (LF, CF, and RL) [11], When designing, it is important to minimize total harmonic distortion (THD) and ripple voltage (RV) at linear and nonlinear rectifier (RC) loads. Given its importance, the design of the filter has a very important role in reducing losses and increasing output accuracy, and it is considered a new work in conjunction with a positive phase sequence. The total of the values of the reactive power (Q) that can be produced in the inductive and capacitive filter is indicated by (LF, and CF), which should have required egalitarianism of interacting power coefficients.

L_{f} = \sqrt{\frac{1}{M}} (\frac{1}{f_{s}}) R_{L} a n d C_{f} = (\frac{1}{f_{s}}) (\frac{1}{R_{L}})

(1)

Where,

R_{L} :

is the load resistance,

f_{S} :

is the switching frequency,

M :

is the modulation index.

L_{f} = (\frac{1}{3}) (\frac{1}{f_{S}}) R_{L} a n d C_{f} = (\frac{1}{f_{S}}) (\frac{1}{R_{L}})

(2)

The compound splicing (CS) of balance load which is displayed in Figure 3A,B) displays 4 lines egalitarian to PWM.

L_{f} = [[\sqrt{\frac{1}{M}} (\frac{1}{f_{S}}) R_{L}] / / [(\frac{1}{3}) (\frac{1}{f_{S}}) R_{L}]] a n d [C_{f} > [(\frac{1}{f_{s}}) (\frac{1}{R_{L}})] / / [(\frac{1}{f_{S}}) (\frac{1}{R_{L}})]

(3)

Ultrasonic PWM is advantageous for reducing the ripple voltage's (RV) amplitude, depending on the passive components employed. Given that the inductance serves as the current source, an excess current will mostly flow through the capacitor's (CF) filter, raising the output voltage. Therefore, it would appear that cutting would take longer in an inverter than switching ( ON-OFF), thus overtaking would be similar to the open circuit's work [12,13]. The output voltage controller's accuracy is at its highest for tiny modulation indices (M) due to the potential for a rise in the primary harmonics of an inverter output voltage that could result from (1-M) VDC. For lower productivity filter inductances, we should have a modest modulation index (M) so that the voltage controller in use is accurate enough. The voltage value above the filter inductor must be greatly raised when a nonlinear rectifier RC load starts to operate and pulse current starts to flow to the load capacitor. From equation (4), M appears at an extreme worth that is constrained [14].

Controlling the modulation index (M) is one method for boosting voltage gain (Hertel et al; 2018), however doing so alters the duty cycle, which impacts losses. in this state, we must manipulate the (1-M) base, which has the potential to result in current ripples at low frequencies, to generate PWM with a significant jump in duty cycle support.

M_{m a x} < \frac{\sqrt{3}}{2} / (\frac{W_{m} L_{f}}{R_{S}} + \frac{\sqrt{3}}{2})

(4)

That the compound splicing (CS) in block A employs a portion of capacitors to define the redistribution of active power among the phases and compensate for most of the load's reactive power, also in part B the capacitors compensate for the active and reactive power on the other side, the crew load compensator can achieve the appropriate power factor and total stability. Contrary to the conventional compensation method, this is the new best technique. It will result in small size, reduced costs, elastic control, high accuracy (99%), and extremely low losses (0.11%). The correctness of the system is observed using the MATLAB, Simulink application. It has been found that the system's precision and low losses depend on passive components; this depends on UPWM, and the compounds of (LF, C F, and RL) change in value in response to ultrasonic PWM. Table 1., makes it evident that the values of the passive components (CL, LF, and RL) depend on the accuracy and losses of the ultrasonic PWM signal.

Due to the triple harmonics that result from the neutral point's incidence, an inverter's PWM needs to be modified [15]. For voltage and current variables, A balanced load of matrices was shown in equation (5).

{[X_{1} X_{2} X_{3}]}^{T} = {[X_{1 k} c o s w t X_{2 k} \cos (w t - 120^{0}) X_{3 k} \cos (w t - 240^{0})]}^{T}

(5)

The constant and sync framing αβ is offered by converting the matrix as follows:

(6)

Where: ω is the grid frequency, αβ is the evidence of the constant shape, and the positive and negative shapes (voltage and current) denote the series of synchronous shaps in the positive sequence voltage.

[\begin{matrix} i_{R S} \\ i_{S T} \\ i_{T R} \end{matrix}] = \frac{1}{3} [\begin{matrix} i R - i S \\ i S - i T \\ i T - i R \end{matrix}] + [\begin{matrix} i_{r} \\ i_{r} \\ i_{r} \end{matrix}]

(7)

Where: The positive-phase sequence is signified in

[i_{r} = I_{o} \cos (ω t + γ)]

. The relation between line-to-line voltage and a neutral point for the grid is specified via the following:

[\begin{matrix} V_{R S} \\ V_{S T} \\ V_{T R} \end{matrix}] = [\begin{matrix} V_{R O} & - & V_{S O} \\ V_{S O} & - & V_{T O} \\ V_{T O} & - & V_{R O} \end{matrix}]

(8)

The voltage control of the DC abilities depends on the equipped input design. The immediate and medium energy losses worth are calculated as follows.

Positive sequence voltages:

[\begin{matrix} P_{R S} \\ P_{S T} \\ P_{T R} \end{matrix}] = \frac{1}{2} [\begin{matrix} \frac{1}{2} V_{\bar{q}} & + \frac{\sqrt{3}}{2} V_{\bar{d}} & \frac{\sqrt{3}}{2} V_{\bar{q}} - \frac{1}{2} V_{\bar{d}} \\ - V_{\bar{q}} & 0 & V_{\bar{d}} 0 \\ \frac{1}{2} V_{\tilde{q}} & - \frac{\sqrt{3}}{2} V_{\bar{d}} & - \frac{\sqrt{3}}{2} V_{\bar{q}} - \frac{1}{2} V_{\bar{d}} \end{matrix}] [\begin{matrix} i_{q} \\ i_{d} \end{matrix}]

(9)

Negative phase sequence voltages:

[\begin{matrix} P_{\bar{R S}} \\ P_{\bar{S T}} \\ P_{\bar{T R}} \end{matrix}] = \frac{1}{2} [\begin{matrix} \frac{1}{2} V_{q} + \frac{\sqrt{3}}{2} V_{d} \frac{\sqrt{3}}{2} V_{q} - \frac{1}{2} V_{d} \\ - V_{q} 0 V_{d} 0 \\ \frac{1}{2} V_{q} - \frac{\sqrt{3}}{2} V_{d} - \frac{\sqrt{3}}{2} V_{q} - \frac{1}{2} V_{d} \end{matrix}] [\begin{matrix} i_{\bar{q}} \\ i_{\bar{d}} \end{matrix}]

(10)

It might note from equation (8) that they are not stable, and based on this, the proposition utilized in the search is to locate the duration of the switching frequency by mutable the worths of the Lf, Cf. thus the duty cycle of ultrasonic PWM is controlled, and after that, these worths can fulfill demands for high accuracy and low losses.

[\begin{matrix} P_{R S}^{L C} \\ P_{S T}^{L C} \\ P_{T R}^{L C} \end{matrix}] = \frac{1}{2} [\begin{matrix} \frac{3}{2} V_{q} + \frac{\sqrt{3}}{2} V_{d} + \frac{3}{2} V_{\bar{q}} + \frac{\sqrt{3}}{2} V_{\bar{d}} & \frac{\sqrt{3}}{2} V_{q} - \frac{3}{2} V_{d} - \frac{\sqrt{3}}{2} V_{\bar{q}} + \frac{\sqrt{3}}{2} V_{\bar{d}} \\ - \sqrt{3} V_{q}^{+} - 3 V_{d}^{-} & - \sqrt{3} V_{q}^{+} + 3 V_{d}^{-} \\ \frac{- 3}{2} V_{q} + \frac{\sqrt{3}}{2} V_{d} - \frac{3}{2} V_{\bar{q}} + \frac{\sqrt{3}}{2} V_{\bar{d}} & \frac{\sqrt{3}}{2} V_{q} + \frac{3}{2} V_{d} - \frac{\sqrt{3}}{2} V_{\bar{q}} - \frac{\sqrt{3}}{2} V_{\bar{d}} \end{matrix}] [\begin{matrix} i_{L C} c o s γ \\ i_{L C} c o s y \end{matrix}]

(11)

The power of every phase is 1 to 3 of the gross energy production. The Clark transformation is signified as follows.

[\begin{matrix} x_{α} \\ x_{β} \end{matrix}] = \frac{2}{3} [\begin{matrix} 1 & - 1 / 2 & - 1 / 2 \\ 0 & \frac{\sqrt{3}}{2} & - \frac{\sqrt{3}}{2} \end{matrix}] [\begin{matrix} x_{1} \\ x_{2} \\ x_{3} \end{matrix}], [\begin{matrix} x_{1} \\ x_{2} \\ x_{3} \end{matrix}] = [\begin{matrix} 1 & 0 \\ - \frac{1}{2} & \frac{\sqrt{3}}{2} \\ - \frac{1}{2} & - \frac{\sqrt{3}}{2} \end{matrix}] [\begin{matrix} x_{α} \\ x_{β} \end{matrix}]

(12)

The merit of utilizing αβ and dq in the constant shape is to disconnect axes from a mutable, the control of the constant shape is carried out via the phase shift by (90⁰) of two sine waves, with the reference voltage, but be an obstacle when the reference voltage is unsteady with frequency. Park transformation at constant αβ and dq wording also uses ωk as the angular basic frequency of the output.

P^{- 1} = P_{x α β, d q}^{- 1} = {[i_{L f, α, d} i_{L f, β, q} V_{o, α, d} V_{o, β, q}]}^{T}

(13)

Lastly, power equations signal that the balance of the product is caused via the balanced of LF, and CF, by the alterations that amount are restricted, thus, the synchronous UPWM with active of FPGA, filter design, and microcontroller by an oscillator circuit, gave positive results through high accuracy and low losses.

The third factor to improve output is the design of the ADC circuit was used to control the output by determining the value of the input voltage as well as to maintain the continuity of the voltage flow to the LC tanks in conjunction with the inverter work and thus it enhances the work of the MOSFET through the continuity of the voltage flow regularly, in addition to feeding the FPGA in digitally of bits sequentially [15]. Thus ADC transforms voltages through a few input bandwidths, and it rejects distortion in high frequencies, also its work is slow. It is characterized by its high accuracy through fastening of modulation frequency at 50Hz or 60Hz, a little current is used and it is desirable in different uses [16]. See Figure 4.

The dual-slope of the ADC circuit through Figure 4, is comprised of logic switching, an integrator circuit, comparator it works as a comparison between the input voltage and the reference voltage. The clock cycle, displays the time needed to measure the input voltage, the unknown voltage identified in the integration circuit and it represents the reference voltage. The switching works by the difference between the measured voltage and the reference voltage. The process is repeated by the integration circuit by unloading the capacitor charge bound in parallel with the integrator component. The conversion of the dual slope is in two stages, the first is run-up, which is called the (counting up) phase, and the second stage is run-down, which is called the phase (counting down). Through run-up, the provider of voltage to the integration component by the input voltage, in this case, the voltage supply of the integration component is chosen by the switch of action. Then, the integration components permit charging the capacitor for a specified period, for the run-down, the input voltage to the integration component is through reference voltage, i.e. the voltages are negative, and the reference voltages value is chosen by the integrator component based on to the switch devices. The integrator time of the output unit in this phase is zero. When the input voltage value is constant, the integrator component output appears in the following equation. [16,17].

V_{0} = \frac{V_{i n}}{R C} (T_{i n t} + V_{i n t})

(14)

V_{i} = - V_{ref} (\frac{T_{d}}{T_{up}})

(15)

Where: Vo is the output voltage

,

Vref is the reference voltage, Vi is the input voltage R and

C,

is the resistor and capacitor,

V i n t

, initial supplied voltage,

T i n t

, initial time.

The fourth factor in improving the output is the use of 4GHz frequency in the oscillator circuit to control the operation of the system without the need for external control components. This leads to a small size of the device, high accuracy, and low losses through the use of an external LC circuit, and RL slow charging circuit to increase the accuracy of the inverter work and increase the control. See Figure 5.

3. Results and Discussion

The oscillator circuit used a clock frequency of 4GHz, in this case, all the operations of an inverter are controlled in real-time, the design of the Ultrasonic PWM inverter system uses the frequency ratio changing technique to use minimize the unwanted harmonics. Through the results in Table 1., note the effectiveness of the passive components in generating ultrasonic PWM in the output system, note when 20kHz, 30kHz, and 90kHz been obtained a high accuracy is 99%, and few losses of THD is (0.1%

\to 0.8 %)

, this is meaning that the medium energy of switching losses (EMS) is low, as the switching losses depend on the input voltage (Vi) and output of current (Io), as well as the switching frequency (

f s

) and time that determines the work of switching between turn-on (t2+t3) and turn-off (t5+t6). See equation (16), and see Figure 6.

E_{M S} = \frac{1}{2} (V_{i} I_{o}) (t_{o n} + t_{o f f}) (f_{S})

(16)

Where:

E M S

is the medium energy of switching losses,

f s

is the switching frequency.

medium energy of conduction losses (EMC) is tiny because it depends on the output current (Io), RDS is the resistance of drain-source of a MOSFET, and duty cycle. see equation (17)

E_{o n} = I D_{o n} * V D D * (\frac{t r i + t f v}{2})

(18)

Whereas

t_{o n} = t r_{i} + t f_{V}

Where:

E_{o n}

energy in a turn-on,

I D

Drain current in a turn-on,

V D D

Drain voltage in a turn-on,

t r i

rise time of current in a turn-on, and

t f v

fall time of voltage in a turn-on

P_{on} = E_{on} {* f}_{s}

(19)

V G S

is very small thus the energy off is:

E_{o f f} = I D_{o n} * V D D * (\frac{t_{o f f}}{2})

(20)

Whereas

t_{o f f} = t r_{V} + t f_{i}

P_{o f f} = E_{o f f} * f_{S}

(21)

We conclude from equation (16). This raise in the switching frequency results in a rise in the medium energy switching losses. The medium switching energy loss is relying upon turn-on and turn-off periods, and the medium switching losses is too rely on the switching frequency, While, the conduction losses of equation (17) rely on the duty cycle (D).

The principle treatment that has been worked on in this research is to raise the ultrasonic PWM value from (20kHz-500kHz), to reduce losses and increase accuracy in conjunction with the compound splicing of output via the use of positive phase sequence to compensate for the losses that may occur from the generation of the magnetic field due to increasing the current in the inductance, and thus the generation of the parasitic capacitance, which leads to a occur a high degree of heat and increase the RDS(ON), and after that works to stop the inverter. Also, the design of the ADC gave an impetus to control the input voltage and compare it with the reference voltage, and thus the distortion was controlled to the very smallest possible value.

That utilizing the UPWM from (20—500khz) to acquire the necessary power and the voltage and current between phases, it has become an urgent necessity to improve the work of the inverter in this project thus positive voltage sequence, was employed at active power (P) of 6KW and reactive power (Q) of 3KVAR. Demonstrates that compound splicing using the three-phase dynamic load and synchronous with ultrasonic PWM and FPGA to produces high accuracy and low losses. Knowing that the three-phase dynamic load has been modified in the frequencies (120-500kHz) to an active power (P) of 8KW and a reactive power (Q) of 6KVAR at the frequencies of 120 kHz, 135 kHz, 140 kHz,450 kHz, and 500 kHz to acquire the necessary power, were to extend the period of switching frequency for to avoid interference between current and voltage, see Table 2.

Figure 7. Shows the values of UPWM, active power, reactive power, voltage, current, and the power of positive sequence voltage by the change of the passive components.

Figure 8. a-shows ultrasonic PWM vs: a- accuracy; b- power losses.

Figure 9. Output when using UPWM of 30kHz; a- current, b- voltage when using UPWM of 40kH.

Figure 10. Shows the output at UPWM of 50kHz: a- current; b- voltage.

Figure 11. Shows of output at UPWM 70kHz: a- current b- THD is 0.6%.

Figure 12. The output at UPWM is 80kHz; a- current. b- THD.

Figure 13. a- shows the output current with UPWM is 90kHz; b- shows the output current when using UPWM at 100kHz.

Figure 14. Output when using UPWM at 100kHz: a-voltage. b- THD.

Figure 15. The output when using UPWM is 120kHz, a-.current, b- voltage.

Figure 16. a- UPWM at 120kHz; a- THD is 0.1%; b- UPWM at 135kHz THD is 0.16%.

Figure 17. The output when using UPWM of 135kHz; a- current; b- voltage.

Figure 18. The output when using UPWM of 500 kHz; a- current; b- voltage.

4. Conclusion

That the use of ultrasonic PWM of the range at (20-500kHz) and enhancement to the action of these frequencies via FPGA, gave positive results with the presence of filter (CS) and with the use of the positive-phase sequence is a novelty, and the obtaining high accuracy in the inverter, and significantly reducing losses in the output. as well the oscillator circuit with 4GHz was used as accuracy control of all parameters of the inverter by software only and so not needed external components to control the output and by that the inverter became of low volume, and its cost is low. knowing that these frequencies gave response results to control the work of MOSFETs, In addition to the ADC design and its presence near the source of nutrition, it has DC link voltage synchronization, which led to the continuity of the work in the inverter. thus, the FPGA and ultrasonic PWM boost MOSFET work with high efficiency, knowing, that determination of the overvoltage and discharge in the inductance and DC link was by microcontroller (oscillator circuit with use 4GHz) to refinement ability of the MOSFETs to continuous work, as the results gave validate prove that.

Acknowledgments

The authors would like to thank the president of the university and Vice-Chancellor of affairs of academics, prof. DR. ISMI ARIF BIN ISMAIL in Universiti Putra Malaysia for their assistance in overcoming difficulties.

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Figure 1. schematic diagram to illustrate the generation of an Ultrasonic PWM.

Figure 2. shows the ultrasonic transducer; a-transmitter, b- receiver.

Figure 3. Graphic outline of compound splicing attached with the inverter.

Figure 4. Block diagram of dual-slope ADC.

Figure 5. Output of the oscillator circuit and FPGA after connected with the PPI 8255A.

Figure 6. Diagram of power losses of the MOSFETs in an inverter (EMS and EMC).

Table 1. Shows the rapport between low loss and ultrasonic PWM.

Ultrasonic PWM (kHz)(UPWM)	CF (Farad)	LF (Henry)	THDV&I %
20	$2.0 \times 10^{- 6}$	$1.0 \times 10^{- 3}$	0.1%
25	$2.5 \times 10^{- 6}$	$1.0 \times 10^{- 3}$	0.8%
27	$2.6 \times 10^{- 6}$	1.2 $\times 10^{- 3}$	0.2%
30	2.0 $\times 10^{- 6}$	$2.8 \times 10^{- 3}$	0.1%
36	$2.7 \times 10^{- 6}$	$4.6 \times 10^{- 3}$	0.3%
39	$2.5 \times 10^{- 6}$	$2.6 \times 10^{- 3}$	0.8%
40	2.2 $\times 10^{- 6}$	3.0 $\times 10^{- 3}$	0.9%
43	$2.6 \times 10^{- 6}$	$3.2 \times 10^{- 3}$	0.4%
50	2.4 $\times 10^{- 6}$	3.2 $\times 10^{- 3}$	0.6%
51	$2.4 \times 10^{- 6}$	$3.2 \times 10^{- 3}$	0.7%
60	$2.5 \times 10^{- 6}$	$3.5 \times 10^{- 3}$	0.6%
70	$2.4 \times 10^{- 6}$	$3.8 \times 10^{- 3}$	0.6%
80	$2.2 \times 10^{- 6}$	$2.8 \times 10^{- 3}$	0.4%
90	$2.7 \times 10^{- 6}$	$2.9 \times 10^{- 3}$	0.1%
100	$2.7 \times 10^{- 6}$	$3.9 \times 10^{- 3}$	0.3%
120	$4.4 \times 10^{- 6}$	$5.0 \times 10^{- 3}$	0.2%
135	$4.6 \times 10^{- 6}$	$5.2 \times 10^{- 3}$	0.1%
140	$4.8 \times 10^{- 6}$	$5.4 \times 10^{- 3}$	0.1%
450	$5.0 \times 10^{- 6}$	$5.8 \times 10^{- 3}$	0.1%
500	5.2 $\times 10^{- 6}$	6.2 $\times 10^{- 3}$	0.1%

Table 2. Shows the relationship between the ultrasonic PWM and generated voltage, current, positive sequence voltage, active power (P), and reactive power(Q), these results depend on the passive components (CF, LF, and RL).

Ultrasonic PWM (kHz)	Active Power (W)	Reactive Power (VAR)	The voltage between phase to phase (V)	The current between phase to phase (A)	Positive sequence voltage in (W)
$20$	$1.5 \times 10^{5}$	$1.8 \times 10^{5}$	$1.0 \times 10^{2}$	$1.8 \times 10^{3}$	$1.4 \times 10^{6}$
$30$	$1.2 \times 10^{6}$	$1.9 \times 10^{6}$	$8.6 \times 10^{3}$	$2.4 \times 10^{3}$	$2.2 \times 10^{7}$
$40$	$5.3 \times 10^{6}$	$1.8 \times 10^{7}$	$9.3 \times 10^{3}$	$5.2 \times 10^{3}$	$4.2 \times 10^{7}$
$50$	$6.8 \times 10^{7}$	$1.1 \times 10^{7}$	$9.4 \times 10^{3}$	$5.2 \times 10^{3}$	$5.0 \times 10^{7}$
$60$	$7.7 \times 10^{7}$	$2.0 \times 10^{7}$	$9.41 \times 10^{3}$	$5.3 \times 10^{3}$	$5.1 \times 10^{7}$
$70$	$8.9 \times 10^{7}$	$7.8 \times 10^{7}$	$5.7 \times 10^{4}$	$6.1 \times 10^{3}$	$5.5 \times 10^{7}$
$80$	$9.4 \times 10^{7}$	$1.3 \times 10^{8}$	$6.4 \times 10^{4}$	$6.3 \times 10^{3}$	$1.1 \times 10^{8}$
$90$	$1.7 \times 10^{8}$	$3.2 \times 10^{8}$	$9.1 \times 10^{4}$	$1.8 \times 10^{4}$	$1.3 \times 10^{8}$
$100$	$2.7 \times 10^{8}$	$4.0 \times 10^{8}$	9.2 $\times 10^{3}$	$2.4 \times 10^{4}$	$3.2 \times 10^{8}$
$120$	$3.3 \times 10^{8}$	$4.5 \times 10^{8}$	$9.7 \times 10^{3}$	$5.7 \times 10^{4}$	3.4 $\times 10^{8}$
135	8.5 $\times 10^{8}$	4.9 $\times 10^{9}$	4.94 $\times 10^{4}$	5.8 $\times 10^{4}$	3.6 $\times 10^{8}$
$140$	$9.7 \times 10^{8}$	$5.3 \times 10^{9}$	$5.6 \times 10^{5}$	$6.1 \times 10^{4}$	$4.6 \times 10^{8}$
$450$	$9.92 \times 10^{8}$	$6.1 \times 10^{9}$	$2.8 \times 10^{5}$	$7.4 \times 10^{4}$	6.5 $\times 10^{8}$
500	$9.2 \times 10^{8}$	2.6 $\times 10^{9}$	3.0 $\times 10^{4}$	2.8 $\times 10^{4}$	6.8 $\times 10^{8}$

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Inverter Design in Low Loss by Using Ultrasonic PWM

Abstract

Keywords:

Subject:

1. Introduction

1.1. Literature Review And Problem Statement

2. Material and Method

3. Results and Discussion

4. Conclusion

Acknowledgments

References

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