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Analysis of Concurrent Systems Based on Interval Order

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Yang Xu  *,
YE Chen  *
,
Chen Yi Jun  *

This version is not peer-reviewed

Submitted:

01 May 2023

Posted:

02 May 2023

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Abstract
Studying concurrent systems is to sort the read/write and control events in the concurrent system according to the order, or in partial order, or in strict order. Because of the concurrency of events and the timeliness of writing events, there will be overlap between events, which requires interval order analysis. A single start and end sequence to represent the entire hierarchical order structure as well as all equivalent spaced order observations.a single sequence of beginnings and endings to represent the entire stratified order structures as well as all equivalent interval order observations. Mazurkiewicz traces and Comtracks are hierarchical traces, but they cannot describe interval traces. In a few sentences of this summary, we can tell the problems (petri interval traces with data), the previous work (Mazurkiewicz traces, Comtracks), the reasons that cannot be solved, and our own solutions (DPN: Petri nets with data, interval traces). This paper focuses on a BE (Beginnings and Endings) sequence representing an equivalent class of runs, or targets. Our goal is to have a BE sequence to represent the entire hierarchical order structure, that is, all equivalent observable interval orders.
Keywords: 
Subject: Computer Science and Mathematics  -   Computer Science

Introduction

In concurrent systems, most behavioral semantics are defined according to total order or stratified step order. If the causal relationship is considered, concurrent history is partial order [1,2,3] or Mazurkiewicz trace [4]. The Mazurkiewicz trace allows an equivalent single sequence, to represent the entire partial order. Traces provide a simple link between the observational and process semantics of concurrency systems. Another trace Comtraces represents the hierarchical sequence structure by a single step sequence, and its related observations can be obtained as a hierarchical or interval extension of the appropriate partial order [5,6]. A sequence of events that contains a causal relationship needs to be represented by a step-by-step sequence, or by a structure using a hierarchical order. An interval order structure is required when modeling the relationship, or when the observation is an interval order. Other relevant observations can be obtained as stratified or interval expansion of appropriate partial order. All observations of causality [7,8] are step sequences, which use stratified order structures. When modeling with the "no later than" relationship or all observations are interval order [9], the interval order structure should be employed to describe the observations.
When studying the behavior patterns of the concurrent system, the read and write data events in the concurrent system are sorted according to the sequence relationship, either in partial orders [10] or in total orders. Because of the concurrency of events [11,12,13] and the time required to writing events, there will be overlap between events, which requires interval order analysis. For most concurrency models, it is problematic to directly generate interval order. A very good way to represent sequences with feasible interval order is to use the beginnings and endings of events involved.
On a monoid-based model, the model will allow a sequence containing the beginning and end of written data events to represent the entire hierarchical order structure, and all equivalent observable interval orders. This completes the write data events by introducing the concept of an interval trace that combines the idea of Mazurkiewicz traces and comtrace, and proves that converting the write events into each interval trace at the beginning and end, uniquely identifies the interval order structure.
The impact of data on control flow cannot be described in ordinary Petri nets [14] or Petri nets with read arcs [10] or inhibitor arcs [15] for concurrent systems. This paper uses Petri nets with data, namely DPN, to describe the data participation in the modeling and simulation of concurrent systems [16,17,18,19,20]. This paper will also show how interval write data traces describe the interval orders semantics of Petri nets with data, so as to analyze the operation of concurrent systems. Through the analysis of the results, the interval trace is applied to the concurrent system with data Petri net description.
The main contributions are as follows:
1.Using Petri nets with data, namely DPN, to describe the data participation in the modeling and simulation of concurrent systems. 2.A BE (Beginnings and Endings) sequence representing an equivalent class of runs, or targets. The goal is to have a BE sequence to represent the entire hierarchical order structure, that is, all equivalent observable interval orders. 3.How interval write data traces describe the interval orders semantics of Petri nets with data, so as to analyze the operation of concurrent systems. Through the analysis of the results, the interval trace is applied to the concurrent system with data Petri net description.
The rest of this paper is organized as follows. Session II to III discuss the relevant concepts and modeling model work. Session II provides some basic mathematical knowledge about partial order, complete order, hierarchical order and interval order, as well as Mazurkiewicz traces and Comtraces. Then, the Petri net and the Petri network with the data are introduced in Session III. In Session Iv, the addition of beginnings and endings of writing events in DPN for description, as well as experiments performed in netDraw. In Session V, the application of the interval trajectory is discussed, and the interval trajectory is analyzed to effectively represent the abstract interval order semantics of DPN. In Session VI, we present the running results of the interval of the case, indicating that the proposed interval sequence correctly describes the analysis of the control process based on the interval order.

1. Mathematical Foundations

We will introduce some relevant mathematical symbols and concepts such as partial order, hierarchical order, interval order, Mazurkiewicz trace and Comtraces and etc.

1.1. Partial orders,Stratified order and Interval order

Sort description of events running in a concurrent system, partial order is one of the tools to describe the relationship between events in a concurrent system. Will be used as a complete representation of events running in the concurrent system and a partial representation of concurrent events. There are also hierarchical sequences, complete sequences, and interval sequences, which can all sequence the events. Figure 1 presents the time-based orders. The definitions of different orders are presented as follows.
Definition 1 
(Partial Orders). The relation < ⊆ E × E is a (strict) partial order if it is transitive and irreflexive, i.e., for all e 1 , e 2 , e 3 ∈ E, e 1 < e 2 < e 3 ⇒ e 1 < e 3 . and:
1) e 1 ⌢ < e 2 ⇔ d f ¬ ( e 1 < e 2 ) ∧ ¬ ( e 2 < e 1 ) ∧ e 1 ≠ e 2 ,
2) e 1 < ⌢ e 2 ⇔ d f e 1 < e 2 ∨ e 1 ⌢ < e 2
Note that e 1 ⌢ < e 2 means e 1 and e 2 are incomparable (w.r.t.<) elements E.
Definition 2 
(Total order). For a relation R 1 ⊆ E × E , any relation R 2 ⊆ E × E is an extension of R 1 if R 1 ⊆ R 2 . we define Total ( < ) ⇔ d f { ◃ ⊆ E × E } , where ◃ is a total order and < ⊆ ◃
Definition 3 
(Stratified orders). Stratified orders are often defined in an alternative way,i.e., a partial order < on E is stratified iff there exists a total order ◃ on some n and a mapping O : m → n such that ∀ m , n ∈ E . m < n ⇔ ϕ ( m ) ◃ ϕ ( n ) . This definition is illustrated in Figure 1, where ϕ ( 1 ) = { 1 } , ϕ ( 2 ) = ϕ { 3 } = { 2 , 3 } and ϕ ( 4 ) = { 4 } .
Theorem 1.(Fishburn [1970]) A partial order < on E is interval if and only if there exists a total order ◃ on some W, and two mappings B , E : y → W such that for all a , b ∈ E :
1) B ( a ) < E ( b ) ,
2) a < b ⇔ E ( a ) ◃ B ( b ) .
Usually B ( a ) is interpreted as the beginning and E ( a ) as the end of an interval a (Such events/actions consume time). The intuition of Fishburn’s theorem is illustrated in Figure 1 with < 3 and ◃ 3 . For all a , b ∈ { 1 , 2 , 3 , 4 } , we have B ( a ) ◃ 3 E ( a ) and a < 3 b ⇔ E ( a ) ◃ 3 B ( b ) . For better readability in the future we will skip parentheses in B ( a ) and E ( a ) .
In summary, we can conclude that:
1) < is total if ⌢ < = O , In other words, for all e 1 , e 2 ∈ X , e 1 > e 2 ∨ e 2 < e 1 ∨ e 1 = e 2 . For clarity, we will reserve the symbol ◃ to denote total orders;
2) < is stratified if e 1 − < e 2 ⌢ < e 3 ⇒ e 1 ⌢ < e 3 ∨ e 1 = e 3 , i.e., the relation ⌢ < ⋃ i d X is an equivalence relation on X;
3) < is interval if for all a , b , c , d ∈ E , e 1 < e 3 ∧ e 2 < e 4 ⇒ e 1 < e 4 ∨ e 2 < e 3 .

1.2. Mazurkiewicz Traces

In 1970, Anthony Mazurkiewicz first proposed the trace theory [21,22,23,24,25,26,27] due to the generation, which was also driven by Petri Nets [28,29,30,31,32,33,34,35,36,37] and the formal language with automata. The aim is to circumvent some of the problems in the theory of concurrent computation, initially, the most popular way to deal with concurrency is interweaving. Includes interleaved and non-deterministic selection issues regarding process computational refinement. Mazurkiewicz Traces, often abbreviated as traces, correspond to a sequence of atomic actions of concurrent systems and are used to model the execution. The concurrent system can then be described by the execution set, called the language in the framework. Currently, the concept of a trace [38] is usually used to describe the non-sequential behavior of a concurrent system through its sequential observation. In this approach, concurrency is replaced by non-deterministic, where concurrent execution of actions is considered as an uncertain choice of the order of execution of these actions. The trace always represents a concurrent process in a sequence associated with a string.
For a concurrent system, the different actions executed are not formed in a linear order, but the events are arranged in partial order. Therefore, the sequential relationship of the execution events of the concurrent system is defined as the partial order.
Definition 4 
(Partia1 order set, poset). Let ( E v , ≤ , λ ) be a poset where Ev is countable.
For e ∈ Ev , we define ↓ e = { e 1 ∈ E v ∣ e 1 ≤ e } and ↑ e = { e 1 ∈ E v ∣ e ≤ e 1 } . We call ↓ e the history of the event e and ↑ e the future of the event e.
Let ≮ be the covering relation given by e 1 < e 2 if e 1 ≤ e 2 , e 1 ≠ e 2 , and for all e 3 ∈ E v , e 1 ≤ e 3 ≤ e 2 implies e 1 = e 3 or e 3 = e 2 .
Moreover, let the concurrency relation (co) be defined as e 1 co e 2 iff e 1 ≰ e 2 and e 2 ≰ e 1 .
The definition of the Mazurkiewicz trace is given below
Definition 5 
(Mazurkiewicz trace). A Mazurkiewicz trace over the independence alphabet ( Σ x , I n ) is a Σ-labeled poset T = ( E v , ≤ , λ ) satisfying:
1) For ∀ e 1 ∈ E v , ↓ e 1 is a finite set.
2) For ∀ e 1 , e 2 ∈ E v , e 1 ⋖ e 2 implies λ ( e 1 ) ⪯ λ e 2 , where ⪯ refers to dependence relation.
3) For ∀ e 1 , e 2 ∈ E v , λ ( e 1 ) ⪯ λ e 2 implies e 1 ≤ e 2 or e 2 ≤ e 1 .
The monoid of Mazurkiewicz traces are on the sequence, equivalent monoid. The application of traces in concurrency theory stems from the fact that traces are sequential representations of partial order. The theory of the traces has been used to solve problems from a number of different fields, which enables the traces to model the "true concurrency" semantics. Including combinatorial theory, graph theory, algebra theory, logic, and especially concurrency theory.

2. The proposed model

Multi-threaded concurrent system is multi-threaded in a multi-core processor, in a certain storage mode, based on the shared memory, under the operation process. Before analyzing the operation of multi-threaded system, give the semantic rules of multi-threaded system, the storage rules of running storage mode, the memory access rules and data transformation rules.

2.1. Multithreaded system

Here presents the syntax of concurrent programming language.
a , b ∈ Values o X ∈ Mod X where X ∈ { R , W } Access modes
r , s , t ∈ Loc ⊆ { r , s , … } Locations sPr ∈ SProg ≜ { 0 , 1 , … , N } → Inst Sequential programs
x ∈ Reg ⊆ { x , y , … } Registers Pr : Tid → SProg (Concurrent) programs
τ , π ∈ Tid ⊆ { T 1 , T 2 , … } Thread identifiers
e : : = r | v | e + e | e = e | e ≠ e ∣ …
Inst ∋ inst : : = r : = e ∣ if e goto pc 1 , … , pc n ∣ assert ( e )
| x . s t o r e ( e , o W ) | r : = x · load ( o R )
A finite set Loc of memory location; a finite set Reg of (local) register; a finite set Val of value; a finite set TId of thread identifier;
Owicki Gries inference logic is used for concurrency. OG inference extends Hoare’s proof rule logic and rules to infer the concurrent program form C 1 || C 2 , allowing the combination of verified programs C 1 and C 2 into a verified concurrent program, provided that the two C1 and C2 proofs do not interfere with each other:
READ:
P 1 ⇒ P 2 x v / a
〈 { P 1 , P 2 } , ⌀ 〉 ⊢ { P 1 } a : = x { P 1 } .
WRITE:
P 1 ⇒ P 1 e / x v
{ P 1 , Q 1 } , x v , e , P 1 ⊢ { P 1 } x : = e { P 1 }
SEQ:
R 2 ; G 2 ⊢ { R } c 2 { Q }
R 1 ∪ R 2 ; G 1 ∪ G 2 ⊢ { P } c 1 ; c 2 { Q }
ITE:
〈 R ; G 〉 ⊢ { P ∧ e = 0 } c 2 { Q }
〈 R ∪ { P } ; G 〉 ⊢ { P } if ( e ) then c 1 else c 2 { Q }
P ∧ e = 0 ⇒ Q P ⇒ P R ′ ⊆ R G ′ ⊆ G Q ′ ⇒ Q
WHILE:
〈 R ; G 〉 ⊢ { P ∧ e ≠ 0 } c { P }
〈 R ∪ { Q } ; G 〉 ⊢ { P } while ( e ) c { Q } .
CONSEQ:
R ′ ; G ′ ⊢ P ′ C { Q }
〈 R ∪ { P , Q } ; G 〉 ⊢ { P } C { Q }
With the advent of non-volatile memory, the presence of permanent memory in the storage system requires new storage modes to verify multithreaded concurrent systems. volatile memory storage mode of random access memory (RAM), and non-volatile permanent storage mode(NVM) have emerged in the storage system, as shown in Figure 2 and Figure 3.
In persistent memory model [39,40,41,42], Multithreaded system verification [39,43] is very important, since it is difficult to verify the correctness of a Multithreaded system [44,45] sharing variables [46,47,48,49,50,51,52,52]. Prior work fails to well consider the impact of data on control flow, which makes verification more difficult [17,18,19,20]. Figure 4 is the two multi-thread systems sharing x and y in the persistent memory mode, r 1 , r 2 are local variables, where x, y are shared variables, thread 1 and thread 2 run concurrently, thread 1 and thread 2 assign 2 and 1 respectively to x, and thread 1 reads the value of x, which may be 1 or 2. If the read value of x is 2, 1 is written to the y. thread 2 may read the value of y as 1 or 0 (initial), and judge the value of r 2 . If the read value r 2 of y is 0, Number 3 is assigned as the value of x.

2.2. Petri net with read-write data

Definition 6 
(Petri net). Petri net [53,54] is a triplet P N i =(Pl, Tr, Fl), where Pl and Tr are respectively finite sets of places and transitions Pl ∩ Tr = ⌀ and Pl ∪ Tr ≠ ⌀ ) . while Fl ⊆ ( Pl × Tr ) ∪ ( Tr × Pl ) is a set of arcs (flow relationships). • x = { y ∈ P l ∪ T ∣ ( y , x ) ∈ F l } ; x • = { y ∈ P l ∪ T r ∣ ( x , y ) ∈ F l } . ∀ x ∈ P l ∪ T r : • x ∪ x • ≠ ⌀ .
Figure 5 is a simple example of Petri net, where T r = { t 1 , t 2 , t 3 } ; P l = { p 1 , p 2 , p 3 , p 4 } ; I n ( t 1 , p 1 ) = 2 , I n ( t 1 , p i ) = 0 for i = 2 , 3 , 4 ; O c ( t 1 , p 2 ) = 2 , O c ( t 1 , p 3 ) = 1 , O c ( t 1 , p i ) = 0 f o r i = 1 , 4 ; I n ( t 2 , p 2 ) = 1 , I n ( t 2 , p i ) = 0 for i = 1, 3, 4; O c ( t 2 , p 4 ) = 1 , O c ( t 2 , p i ) = 0 f o r i = 1 , 2 , 3 ; I n ( t 3 , p 3 ) = 1 , I n ( t 3 , p i ) = 0 f o r i = 1 , 2 , 4 ; O c ( t 3 , p 4 ) = 1 , O c ( t 3 , p i ) = 0 f o r i = 1 , 2 , 3 ; M 0 = ( 2 , 0 , 0 , 0 ) .
Definition 7 
(PN transition rules). Let P N i =(N, M) be a simple Petri net and the transition rules :
(1) For transition t 1 ∈ T i , if ∀ p i ∈ • t i : M i ( p i ) ≥ 1 , it is said that transition t i is enabled under the marking M i , which is recorded as M i [ t i 〉 ;
(2) If M i [ t i 〉 , the transition t i can take place under the marking M i ′ , and a new marking M i ′ can be obtained from the transition t i caused by the marking M i , which is marked as M i [ t i 〉 M i ′ for ∀ p i ∈ P ,
The whole state space of P N i =(N, M 0 ) is determined by its network N and initial marking M 0 . Figure 6 shows a transition t 1 firing based on Figure 5, which presents new tokens distribution of this Petri net.
We can find that under marking, M 0 = (2, 0, 0, 0). Firing of t 1 results in a new marking, i.e., M 2 . = (0, 2, 1, 0). Again , It follows the firing rule that M 1 In marking M 1 = (0, 2, 1, 0), both transitions of t 3 and t 2 are enabled. If t 3 fires, the new marking, i.e., M 3 = (0, 2, 0, 1).If t 2 fires, the new marking, i.e., M 2 = (0, 1, 1, 1).
Definition 8 
(Petri net with data: DPN). An 8-tuple D P N i = ( P c , P d , T c , T d , F c , F d , P c 0 , P d 0 ) is called Data Petri net if it meets:
(1) (Pc, Tc, Fc, P c 0 ) is a Petri net;
(2) Pd= p d 1 =[ D 1 , v a l 1 ], p d 2 = [ D 2 , v a l 2 ] . . . p d n = [ D n , v a l n ]. [ D i , v a l i ] is the data place, Pd is a finite set of elements D i , where v a l i is the value of D i , and the token of the initial p d i =1, v a l i =0.
(3) Fd : Td×Pd ∪ Pd×Td. Fd includes read data (Rd) and write data (Wr) arcs, namely Rd : Pd×Td and Wr: Td×Pd;
(4) Wr writing data transition: write the value to D i . Rd read data transition: read the value v a l i from the data place D i .
(5) Td: Td×Pd ∪ Pd×Td. Write data transition Td ⟶ F d Pd, read data transition: Pd ⟶ F d Td.
(6) Configuration: Pc → { 0 , 1 , 2 … } and Pd → { 1 } represent the configuration or state, where c = ( m , σ ) , M is the control marking, σ is the data status. P c 0 is the initial configuration of the control place, and P d 0 is the initial configuration of the data place, p d i = 1 , v a l i = 0 .
For the data place p d i ∈Pd in DPN, its value is obtained by using the function getValue(pd). For convenience, a pair of data transition functions on conversion are also provided, namely Read: getValue( D i ), Write: setValue( p d i )=value.
Definition 9 
(DPN transition rule). and set DPN=(DN,M,Σ) It is a Petri net and has the following transition rules:
(1) For transition t ∈ Tc, if ∀ p ∈ • t : M ( p ) ≥ 1 , control transition t is said to be enabled under the marking M 1 , which is recorded as M 1 [ t 〉 ;
(2) If M 1 [ t 〉 , the control transition t can occur under the marking M 1 , and the transition t caused by the marking M 1 can get a new marking M 1 ′ , which is recorded as M 1 [ t 〉 M 1 ′ ,and for ∀ p ∈ Pc ∪ Pd.
M ′ , Σ ′ = ( M ( p ) − 1 , Σ ) i f p ∈ • t − t • ( M ( p ) + 1 , Σ ′ ) i f p ∈ t • − • t M ( p ) e l s e
For the transition t ∈ T c , if ∀ p ∈ • t : M ( p ) ≥ 1 , the data transition t in marking ( M i , Σ ) is enabled, which is recorded as ( M i , Σ ) [ t 〉 ( M i ′ , Σ ) ;
(3) In the marking ( M i , Σ), if ( M i , Σ)[td〉, data transition t d ∈ T d is enabled and triggered to get a new marking ( M i ′ , Σ ′ ), i.e., ( M i , Σ ) t d > M i ′ , Σ ′ .
M ′ , Σ ′ = ( M ( p ) − 1 , Σ ) i f p ∈ • t − t • ( M ( p ) + 1 , Σ ) i f p ∈ t • − • t ∧ t ∈ P c M ( p ) + 1 , Σ ′ i f p ∈ t • − • t ∧ t ∈ P d M ( p ) ∈ e l s e
Wherein, Σ [ F d ⟶ ( D i , v a l u e ) P d > Σ ′ .
(4) Finally, the entire state space of D P N i =(DN,(M, Σ)) is determined by its network D P N i and initial marking M 0 .
In Figure 7, T 1 is the write data transition, which realizes the write data value 2 to the data place x (there is a green arrow line between the write transition and the data place office). t 8 and t 9 are control transitions. The first step is to obtain the write permission in x, i.e., the token of x. After obtaining the write permission in x, write the value 2 to x, and then return the write permission of the token to x; T 2 is the change of write data. Write the data value 1 to the data place x, and the process is the same as the change of write data t 1 . T 3 is read data transition. Read the value of data place x (there is a blue line between the data place object and the change of read data, and the end of the read data place object is a solid circle). First, judge whether data place object x has read permission, i.e., whether there is a token in x, if hold, it can be read. Read the value of x through the reading arc, if there is no token in x, x cannot be read. The semantics of read data transition t 6 are the same as that of read data transition t 3 .
In Figure 7, if P 1 has a token and the data place D x has a token, t 1 can occur. After the occurrence, the value of x(x, 2) in the data place change to number 2, and the status is shown in Figure 8; If there is a token in P 2 , and there is a token in data place x(x, 2), t 2 can occur. After t 2 transition occur, the value in data place x(x, 1) change to number 1; When P 3 has a token, and the data place has a token in x(x, 1), then t 3 transition can occur. Read the value in x(x, 1) of the data place, and the token in x(x, 1) of the data place remains unchanged, and read the value of data place x is number 1.
In Figure 8, if t 3 is triggered again (i.e., t 1 is triggered first, then t 3 is triggered), the state is shown in Figure 9.

3. Convert the writing event to the Beginning and Ending event

Writing events takes time in theory, so when we study the sequence of reading and writing events, we consider the time of writing events and convert the writing events into two events: starting and ending [55,56]. BE for a given writing event Σ = {Beg a∣a∈ Σ } ⋃ {End a∣a ∈ Σ }. The write data event is converted to the Beginning and Ending events according to Figure 10. For each writing event in Σ , it is transferred into beginning and ending event following by BE Σ ={Ba∣a∈ Σ }⋃{Ea∣a∈ Σ }, where B refers to the beginning event and E refers to the ending one.
Definition 10. 
Let Petri P N i = (P, T, TR, TW, D, m 0 ) be a Petri net with data.
(1) For each t i ∈ TW,now,we define B e g − t i the beginning of t i and E n d t − t i the end of t i , and the set B e g T = { B e g t ∣ t ∈ T w } ∪ { E n d t ∣ t ∈ T w } . The elements of TW are called BE-transitions.
(2) For each t i ∈ T W , we define: (a) • B t = • t , (b) B t • = { t } , (c) • E t = { t } , (d) E t • = t • .
(3) We say that a set m ⊆ P ∪ T is an extended marking if m ∩ • m ∪ m • = ⌀ .
(4) An enabled BE-transition same enabling capacity as Petri net
(5) An extended firing sequence same enabling capacity as Data Petri net
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Figure 11. The writing events of concurrent code in Figure 7 to beginning and ending ones.
Figure 11. The writing events of concurrent code in Figure 7 to beginning and ending ones.
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Figure 12. result[x=2,y=0].
Figure 12. result[x=2,y=0].
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Figure 13. result[x=1,y=1].
Figure 13. result[x=1,y=1].
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Figure 14. result[x=3,y=1].
Figure 14. result[x=3,y=1].
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Figure 15. result[x=3,y=0].
Figure 15. result[x=3,y=0].
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Table 1. The firing trace of transition and the final results of shared variables x and y.
Table 1. The firing trace of transition and the final results of shared variables x and y.
Firing trace of transition x , y
T1 : Bt1, Et1, Bt2, Et2, t3, Bt5, Et5, t6, Bt7, Et7 3 , 0
T 2 : B t 1 , E t 1 , B t 2 , E t 2 , t 3 , t 6 , t 8 , B t 5 , E t 5 1 , 1
T 3 : B t 1 , E t 1 , t 3 , t 4 , B t 2 , E t 2 , t 6 , t 8 1 , 1
T 5 : B t 2 , E t 2 , t 6 , B t 1 , E t 1 , t 8 , t 3 , B t 5 , E t 5 1 , 1
T 4 : B t 2 , E t 2 , t 6 , B t 1 , E t 1 , t 3 , B t 5 , E t 5 , B t 7 , E t 7 3 , 1
T 7 : B t 2 , E t 2 , B t 1 , E t 1 , t 3 , B t 5 , E t 5 , t 6 , B t 7 , E t 7 3 , 1
T 6 : B t 2 , E t 2 , t 6 , t 8 , B t 1 , E t 1 , t 3 , t 4 2 , 0

4. Conclusion

The verification of concurrent system has always been a hot topic of academic research. The verification of concurrent system based on trace realizes the detection of stateless model, which can well reduce the state space and memory consumption. The concept of trace itself is based on state equivalence classification, and again based on the equivalence of numerical traces, classification will further reduce the number of traces.
This paper first introduces the sequence of events describing the operation of a multithreaded concurrent system. The sequence of events has order, bias order, complete order, and hierarchical sequence, interval sequence. In a concurrent multi-threaded system, the events of writing the data need some time, and an interval sequence can be formed between the events of writing the written data. In order to better analyze the running of multi-threading of the concurrent system, the events of read and write data are presented as interval sequence, presented in the form of trace, describing the results of multi-threading running. With a multi-threaded case as the motivation, describe multi-threaded system as Petri net with data, in writing data event x to B (x) and E (x), the event interval sequence, gives the trajectory of the case, and present the state of the data, perfect trajectory with data.
The research [57] in this paper only realizes the interval sequence [4]of events in multi-threaded systems, and analyzed the operation results, which has achieved initial success. However, the data consistency analysis still needs further analysis, and there are still many research work to be further conducted. One is to add the time label to analyze the amount of time. Second, the new permanent storage mode brings a new storage access mode to the concurrent system, which gives new challenges to the model detection of the concurrent system. Further research will be done from the above two aspects.
The equivalence of traces is also the focus of recent research. Based on numerical equivalence trace, some studies have shown that based on numerical trace number less than M trace, especially based on read equivalent trace, less than the number of M trace, this paper has realized the numerical involved in the trace of the trace, the next step, whether can be based on read equivalence, or based on numerical equivalence applied to the Petri net trace, reduce the number of traces, is also a good research idea.

Funding

The APC was funded by National Natural Science Foundation of China (62172166).

References

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Figure 1. Time-based orders. [5]
Figure 1. Time-based orders. [5]
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Figure 2. Volatile Memory.
Figure 2. Volatile Memory.
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Figure 3. Non-Volatile Memory.
Figure 3. Non-Volatile Memory.
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Figure 4. Concurrent code.
Figure 4. Concurrent code.
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Figure 5. A simple Petri net.
Figure 5. A simple Petri net.
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Figure 6. Firing of transition t 1 .
Figure 6. Firing of transition t 1 .
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Figure 7. Concurrent code of Figure 4 described in DPN.
Figure 7. Concurrent code of Figure 4 described in DPN.
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Figure 8. Concurrent code of Figure 7 after t 1 is fired.
Figure 8. Concurrent code of Figure 7 after t 1 is fired.
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Figure 9. Concurrent code of Figure 7 after t 1 and t 3 is fired.
Figure 9. Concurrent code of Figure 7 after t 1 and t 3 is fired.
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Figure 10. Conversion from writing event to beginning and ending one.
Figure 10. Conversion from writing event to beginning and ending one.
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