Preprint Article Version 1 Preserved in Portico This version is not peer-reviewed

Development of Slope Detection ASIC for On-Chip Current Sensing in Voltage Converters

Version 1 : Received: 3 October 2023 / Approved: 4 October 2023 / Online: 4 October 2023 (13:01:43 CEST)

How to cite: Ravasz, R.; Stopjakova, V.; Maljar, D.; Arbet, D.; Nagy, L.; Kovac, M. Development of Slope Detection ASIC for On-Chip Current Sensing in Voltage Converters. Preprints 2023, 2023100238. https://doi.org/10.20944/preprints202310.0238.v1 Ravasz, R.; Stopjakova, V.; Maljar, D.; Arbet, D.; Nagy, L.; Kovac, M. Development of Slope Detection ASIC for On-Chip Current Sensing in Voltage Converters. Preprints 2023, 2023100238. https://doi.org/10.20944/preprints202310.0238.v1

Abstract

This article introduces the design and analysis of a slope detection circuit tailored for on-chip sensing of the load current in DC-DC converters. The novel indirect sensing approach is grounded in measuring the output voltage slope across the filtering capacitor during discharge phases. Consequently, this slope data can be effectively harnessed to control the converter switches. The slope detector circuit was designed in standard 65 nm CMOS technology using the nominal supply voltage of 1.2 V and can be used for current sensing within the range from one to hundreds of mA. Since the proposed circuit has mainly digital character, the robustness to process, temperature and supply voltage variations can be ensured rather conveniently.

Keywords

current sensing methods; voltage drop; slope detector; voltage converters; low-power and low-voltage design; CMOS technology

Subject

Engineering, Electrical and Electronic Engineering

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