preprints.org > computer science and mathematics > hardware and architecture > doi: 10.20944/preprints202405.0657.v1

Preprint Communication Version 1 Preserved in Portico This version is not peer-reviewed

Version 1 : Received: 8 May 2024 / Approved: 10 May 2024 / Online: 10 May 2024 (11:45:39 CEST)

Edge computing helps radio-supported mobile systems to process computing tasks on the side of servers. The proximity to an edge computing node avoids excessive latencies, which benefits the calculation of real-time algorithms. Special computing needs arise because mobile systems are often so limited in weight and energy that they cannot carry powerful on-board computers. We propose the use of FPGA-based co-processors (FPGA: Field Programmable Gate Array) to handle computations in an edge node. The calculation of the Fast Fourier Transformation (FFT) will be presented as an example of a co-processor. The use of FPGA-based co-processors poses a particular challenge when a mobile system leaves its radio cell, and the computing context must be transferred to another edge node. The article first addresses specific edge computing requirements, such as case-by-case reconfiguration of computing hardware and the handover mechanism from one edge node to another. Using the example of an FPGA-based FFT co-processor, we describe its development, which was carried out under the condition that mobile clients can request different co-processors and that they can also change the edge node when changing the radio cell. The latter requires passing the co-processor context. For the FPGA, this means that the co-processor is part of a partially reconfigurable environment and must support the handover mechanisms in hardware. At the end we indicate the need for FPGA resources and compare this with alternative solutions.

FPGA; FFT; Edge Computing; partial FPGA reconfiguration; mobile systems; DSP

Computer Science and Mathematics, Hardware and Architecture

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