Version 1
: Received: 30 June 2024 / Approved: 1 July 2024 / Online: 1 July 2024 (17:55:18 CEST)
How to cite:
Al Abdul Wahid, S.; Asad, A.; Mohammadi, F. A Survey on Neuromorphic Architectures for Running Artificial Intelligence Algorithms. Preprints2024, 2024070130. https://doi.org/10.20944/preprints202407.0130.v1
Al Abdul Wahid, S.; Asad, A.; Mohammadi, F. A Survey on Neuromorphic Architectures for Running Artificial Intelligence Algorithms. Preprints 2024, 2024070130. https://doi.org/10.20944/preprints202407.0130.v1
Al Abdul Wahid, S.; Asad, A.; Mohammadi, F. A Survey on Neuromorphic Architectures for Running Artificial Intelligence Algorithms. Preprints2024, 2024070130. https://doi.org/10.20944/preprints202407.0130.v1
APA Style
Al Abdul Wahid, S., Asad, A., & Mohammadi, F. (2024). A Survey on Neuromorphic Architectures for Running Artificial Intelligence Algorithms. Preprints. https://doi.org/10.20944/preprints202407.0130.v1
Chicago/Turabian Style
Al Abdul Wahid, S., Arghavan Asad and Farah Mohammadi. 2024 "A Survey on Neuromorphic Architectures for Running Artificial Intelligence Algorithms" Preprints. https://doi.org/10.20944/preprints202407.0130.v1
Abstract
Neuromorphic computing, a brain inspired non-Von Neumann computing system, addresses the challenges posed by the Moore’s law memory wall phenomenon. It has the capability to increasingly enhance performance while maintaining power efficiency. Neuromorphic chip architecture requirements vary depending on the application and optimizing it for large-scale applications remains to be a challenge. Neuromorphic chips are programmed using spiking neural networks which provide them with important properties such as parallelism, asynchronism, and on-device learning. Widely used spiking neuron models include the Hodgkin-Huxley Model, Izhikevich model, integrate-and-fire model and spike response model. Hardware implementation platforms of the chip follow three approaches: analog, digital, or a combination of both. Each platform can be implemented using various memory topologies which interconnects with the learning mechanism. Current neuromorphic computing systems typically use the unsupervised learning spike timing-dependent plasticity algorithms. However, algorithms such as voltage-dependent synaptic plasticity have the potential to enhance performance. This review summarizes the potential neuromorphic chip architecture specifications and highlights which applications they are suitable for.
Engineering, Electrical and Electronic Engineering
Copyright:
This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
