1. Introduction
Nowadays, the international community faces a multifaceted global energy challenge, closely intertwined with the issue of global warming primarily induced by greenhouse gases, especially CO
2, in the atmosphere [
1,
2,
3,
4,
5,
6]. Fossil fuels, as the principal sources of approximately 90% of CO
2 emissions and over 70% of all greenhouse gas emissions worldwide, are significant drivers of climate change [
7,
8,
9,
10,
11,
12]. These gases trap solar heat, contributing to a rise in global temperatures [
13,
14,
15,
16].
Addressing global warming necessitates sustainable interventions, including reducing air pollution, which can be achieved through adopting renewable energy sources, minimizing waste, and conserving natural resources [
13,
17,
18,
19]. In this context, photovoltaic energy emerges as a sustainable and long-lasting solution that could mitigate the impacts of global warming [
20,
21,
22]. OSCs, in particular, represent a promising alternative to traditional silicon-based panels due to their environmental benefits and cost-efficiency in production [
23]. Their widespread adoption could significantly enhance global solar energy utilization and reduce the ecological impacts of human activities [
20]. Particularly, the role of OSCs in reducing global warming effects is increasingly recognized [
23,
24,
25]. Although their potential benefits are substantial, further research and development are critical to improve their efficiency and thermal stability [
26,
27,
28,
29,
30].
Improving the thermal stability of OSCs is vital for advancing their commercial viability and operational reliability. Ongoing research focuses on developing new materials and structures that optimize both power conversion efficiency (PCE) and thermal stability. Recent research by Zhang et al.[
29] highlights the efficacy of the ternary blend approach in enhancing the thermal stability of OSCs, and it was found that the PCE of the device at 75°C remained on average 80% of its PCE at 25°C. Key contributors to the charge-transfer state energy in these cells were identified as PBDB-T and IDT-PDOT-C6, with ITC6-2F playing a crucial role in facilitating charge carrier transfers to IDT-PDOT-C6. This mechanism promotes the generation of additional excitons reaching the donor/acceptor interface, thereby achieving high-efficiency photoelectric conversion [
29]. Anass et al.[
31] studied the temperature influence on the performance of the solar cells with [(Cbz-Mth)-B-T]2–PCBM as an active blend, and they found that their structure kept 89% of its room-temperature PCE at 75°C. Another study done by Muhammad et al.[
32] performed a simulation by stepping up the temperature from 300 K to 400 K to study the impact of the raised temperature on the efficiency of their solar cells with PBDB-T: ITIC-OE as a photoactive layer, and they obtained a loss ratio of the efficiency between the temperature range of 300-350 K to approximately 9%, which is a highly stable device. Moreover, the use of charge transport layers is paramount in improving the PCE of OSCs. These layers are essential for the efficient extraction and mobility of charges, while also preventing electron leakage, and are utilized extensively across various materials in the inverted OSCs architecture [
33,
34,
35,
36,
37]. The previous studies found that the best thermal stability achieved by OSCs at 350 K is 9% in the studies done by Anass et al.[
31] and Muhammad et al. [
32], but PCEs achieved in these studies are 7.4% and 6.2%, respectively, which are relatively low. It is challenging to achieve high thermal stability and high PCE at the same time.
This study aims to explore how temperature variations affect the efficiency of inverted bulk heterojunction (BHJ) OSCs. Through simulations using three different electron transport layers—SnO2, Spiro-OMeTAD, and PC60BM, we seek to derive insights into the performance and thermal stability of these cells, specifically focusing on analyses of their high thermal stability (quantified by the PCE loss ratio) at 350K under the high PCE of ~ 20%. This could potentially lead to the development of more efficient and stable OSCs in laboratory settings.
2. The Simulation Model
The simulation employs Oghma-Nano software, which utilizes a 1-dimensional drift-diffusion model for its electrical modeling. The model includes the solution of bi-polar drift-diffusion, charge carrier continuity, Poisson equation, and Maxwell-Boltzmann equation for free charge carrier statistics. The mathematical model can be found in the software's documentation for more detailed information [
38]. The simulated structure of the device is FTO/SnO2/PM6:D18:L8-BO/ PEDOT: PSS/Ag, and the input parameters and thickness are included in
Table 1,
Table 2,
Table 3 and
Table 4.
Bi-polar drift-diffusion equations at the position for both electrons and holes are represented in Equations (1) and (2),
and
where
Jn,p is the electron and hole current density,
q is the elementary charge,
μe, and
μh are the mobilities of electrons and holes, respectively;
Dn and D
p are the electron and hole diffusion coefficients, respectively;
n is the density of electrons, and
p is the density of holes. The charge carrier continuity equations are mentioned in Equations (3) and (4),
and
where
Rn and p are the recombination rate of electrons and holes, respectively;
G is the generation rate.
The solution to Poisson's equation is used to determine the distribution of potential within the device, and it is represented as follows in Equation (5),
where
ɛ0,
ɛr the constants of permittivity in free space and the relative permittivity are constant, respectively;
φ is the voltage profile. The model applies Maxwell-Boltzmann statistics to solve free carriers statistics as mentioned in Equations (6) and (7),
and
where
Nc,
Nv are the constants of the effective density of states in the conduction and valence band of a semiconductor,
Fn,p are constants of the energy level of the Fermi level in the valence and conduction band of a semiconductor,
Ec is the conduction band,
Ev is the valence band,
KB is Boltzmann constant,
T is the temperature.
The boundary conditions between the layer interfaces are represented as tunneling of electrons and holes through layer interfaces provided by Equations (8) and (9),
and
where
Te and
Th is the rate constants of tunneling of electrons and holes, respectively,
n1,2 is the number of electrons in the layers before and after the interface;
p1,2 is the number of holes before and after the interface;
is the equilibrium number of electrons in before and after the interface;
is the equilibrium number of holes in the layers before and after the interface.
More details of the above electrical model of our simulation can be found in Refs. [
39,
40,
41].
3. Results and discussion
The density of current-voltage (
J-V) was simulated under AM 1.5 G illumination with an intensity of 100 mW cm
-2 and a temperature range between 300 K and 400 K. The 1st structure is represented in
Figure 1, and its results are presented in
Figure 2 and
Figure 3. S1 showed the best
PCE of 20.08 % at 300 K with a short circuit current (
Jsc) of 27.4 mA cm
-2, an open circuit voltage (
Voc) of 0.89 V, and a fill factor (
FF) of 82.2%, while the performance relatively decreased between the range of 310 and 400 K to reach a PCE of 15.53%, a
Jsc of 27.35 mAcm
-2, a
Voc of 0.73 V, and a
FF of 77.7% at 400 K. As the results mentioned, the major parameters that cause a reduction in the efficiency of OSCs during the enhancement of temperature are the
Voc and
FF (see
Figure 3 (b),(c)).
and
where
EF,h is the energy corresponding fermi-level;
is the electron donor energy.
The increase in temperature causes an augmentation of the energy loss (ΔE) as demonstrated by eq (11), and then the Voc decreases as a result of that augmentation. The FF showed a negative correlation with temperature which decreased when the temperature increased from 300K to 400K ( from 26.85°C to 126.85 °C). The performance decrease of FF due to the increase of the exponential of the temperature as demonstrated in eq (12). The Jsc showed relative stability under the increase in temperature. The reduction in Jsc can be attributed to the bandgap energy (Eg) effect.
The
FF determines the maximum power output by the OSC, it is defined below in eq (12),
where
Pmax is the maximum power delivered by the OSC,
Vm is the maximum voltage, A is the ideality factor of the semiconductor.
As temperature rises, the
Jsc experiences a marginal increase due to the reduction in
Eg. Consequently, a greater number of photons possess adequate energy to generate electron-hole pairs. Nevertheless, the impact of this phenomenon is quite minor. The exponential relationship between temperature and the reverse saturation current of photovoltaic cells is observed in eq (13). Additionally, this factor can have an impact on the
Jsc.
where
J0 is the reverse saturation current density,
e is the charge of an electron, and
Jph is the photo-current density.
The 2nd structure is presented in
Figure 4, and its results are presented in
Figure 5 and
Figure 6. S2 showed the best
PCE of 20.11% at 300 K with a
Jsc of 27.43 mA cm
-2, a
Voc of 0.89 V, and an
FF of 82.3%, while the efficiency relatively decreased between the range of 310 and 400 K to reach a
PCE of 15.55%, a
Jsc of 27.38 mA cm
-2, a
Voc of 0.73, and a
FF of 78% at 400 k. The results are slightly the same as S1. As S2 results depicted, the major parameters that cause a decrease in the performance of this device during the enhancement of temperature are fundamentally the same as before
Voc and
FF (see
Figure 6 (b), (c)).
The increase in temperature caused an enhancement of the ΔE as demonstrated by eq (11), and then the Voc decreased as a consequence of that enhancement. The diminution in Jsc can be attributed to the concept of Eg. As temperature rises, the short-circuit current, Jsc, experiences a slight increase due to the reduction in Eg. This decrease in bandgap energy enables a greater number of photons to possess sufficient energy for the generation of excitons. The reverse saturation current of photovoltaic cells exhibits an exponential growth pattern about temperature. Additionally, this factor can have an impact on the magnitude of the Jsc as demonstrated in eq (15).
The 3rd structure is presented in
Figure 7, and its outcomes are depicted in
Figure 8 and
Figure 9. At a temperature of 300 K, S3 exhibited the highest
PCE of 18.9%. This was accompanied by a Jsc of 25.8 mA cm
-2, a
Voc of 0.89 V, and a
FF of 82.36%. However, when the temperature increased within the range of 310 to 400 K, the performance of S3 declined.
At 400 K, the
PCE reduced to 14.6%, with a
Jsc of 25.76 mA cm
-2, a
Voc of 0.73 V, and an
FF of 78%. According to the findings from the S3 results, it can be observed that the primary factors contributing to the decline in device performance as temperature increases remain consistent with the
Voc, and
FF (refer to
Figure 9 (b),(c)).
The rise in temperature leads to an increase in ΔE, as indicated by eqs (10, 11). Consequently, the Voc decreases as a result of this increase. The decrease in Jsc can be ascribed to Eg. The Jsc undergoes a marginal augmentation as the temperature increases, primarily as a result of the decrease in the Eg. The reduction in bandgap energy facilitates an increased likelihood of photons possessing the necessary energy to produce electron-hole pairs. The temperature-dependent behavior of photovoltaic cells' reverse saturation current is characterized by an exponential increase as noted before in S1 and S2. Moreover, this particular element can influence the amount of Jsc, as exemplified in eq (11).
We observe that All the structures S1, S2, and S3 showed good performance under the temperature range between 300 and 340K (from 26.85°C to 66.85 °C) (see
Figure 5), which they lost from their initial efficiency of only 8.8%, 8.8%, 8.9%, respectively. The performance parameters
Jsc,
Voc, and
FF showed slightly the same progression, while S3 depicted less
PCE of 18.9% in comparison to S1 and S2 depicted 20.08%, and 20.11%, respectively. The inverted structure employing SnO
2 and Spiro-OMeTAD achieved the best PCE of 20.08% and 20.11%, respectively, in the other hand, the inverted structure using PC
60BM as an electron transport layer (ETL) showed less
PCE. But, all devices worked efficiently in terms of performance.
All the studies showed a stable loss ratio of 11 % between 300 k and 350 K according to the results mentioned in
Table 5. We investigated our results of the loss ratio of
PCE in the function of raising the temperature with some other numerical studies as mentioned in
Table 6. The current study demonstrated the thermal stability of a device with a loss ratio of 11% throughout a temperature from 300 K to 350 K, in contrast to the results of Khan et al. and Kim et al., whose studies reported loss ratios of 15% and 17%, respectively. The studies done by Anass et al. and Muhammad et al. have demonstrated an enhancement in thermal stability when compared to previous research. Furthermore, in addition to its thermal stability, our structure has demonstrated a much higher PCE than Anass et al. And Muhammad et al. Our structures can maintain high thermal stability at high PCE conditions, representing a notable advancement in the OSCs. Our structures can maintain high thermal stability at high PCE conditions of ~20%.