Version 1
: Received: 12 September 2024 / Approved: 13 September 2024 / Online: 13 September 2024 (08:25:00 CEST)
How to cite:
Karimpour, S.; Sekyere, M.; Bruce, I.; Nti Darko, E.; Chen, D.; McAndrew, C. C.; Garrity, D.; Jin, X.; Hatirnaz, I.; He, C. Direct Current To Digital Converter (DCDC): A Current Sensor. Preprints2024, 2024091054. https://doi.org/10.20944/preprints202409.1054.v1
Karimpour, S.; Sekyere, M.; Bruce, I.; Nti Darko, E.; Chen, D.; McAndrew, C. C.; Garrity, D.; Jin, X.; Hatirnaz, I.; He, C. Direct Current To Digital Converter (DCDC): A Current Sensor. Preprints 2024, 2024091054. https://doi.org/10.20944/preprints202409.1054.v1
Karimpour, S.; Sekyere, M.; Bruce, I.; Nti Darko, E.; Chen, D.; McAndrew, C. C.; Garrity, D.; Jin, X.; Hatirnaz, I.; He, C. Direct Current To Digital Converter (DCDC): A Current Sensor. Preprints2024, 2024091054. https://doi.org/10.20944/preprints202409.1054.v1
APA Style
Karimpour, S., Sekyere, M., Bruce, I., Nti Darko, E., Chen, D., McAndrew, C. C., Garrity, D., Jin, X., Hatirnaz, I., & He, C. (2024). Direct Current To Digital Converter (DCDC): A Current Sensor. Preprints. https://doi.org/10.20944/preprints202409.1054.v1
Chicago/Turabian Style
Karimpour, S., Ilhan Hatirnaz and Chen He. 2024 "Direct Current To Digital Converter (DCDC): A Current Sensor" Preprints. https://doi.org/10.20944/preprints202409.1054.v1
Abstract
This paper introduces a systematic approach to the design of Direct Current-to-Digital Converter (DCDC) specifically engineered to overcome the limitations of traditional current measurement methodologies in System-on-Chip (SoC) designs. The proposed DCDC addresses critical challenges such as high power consumption, large area requirements, and the need for intermediate analog signals. By incorporating a current mirror in a cascode topology and managing the current across multiple binary-sized branches with the Successive Approximation Register (SAR) logic, the design achieves precise current measurement. A simple comparator, coupled with an isolation circuit, ensures accurate and reliable sensing. Fabricated using the TSMC 180 nm process, the DCDC achieves 8-bit precision without the need for nonlinearity calibration, showcasing remarkable energy efficiency with an energy per conversion of 1.52 pJ, power consumption of 117 µW, and a compact area of 0.016 mm². This innovative approach not only reduces power consumption and area, but also provides a scalable and efficient solution for next-generation semiconductor technologies. The ability to conduct online measurements during both standard operations and in-field conditions significantly enhances the performance and reliability of SoCs, making this DCDC a promising advancement in the field.
Keywords
reliability; measurement; ADC; DCDC; CMOS; VLSI; SAR
Subject
Engineering, Electrical and Electronic Engineering
Copyright:
This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
