To date, the patent foramen ovale (PFO) does not get the deserved medical attention. The PFO poses a serious threat to health and even life of mankind. The first respective case report in the medical literature dates back to the 19th century. It led to death. The fact that a PFO is present in roughly 25% of people underscores its overall potential to do harm. Yet at the same time by the sheer number, it discourages the medical community from screening for it and from treating it. About 5% of the population have particularly dangerous forms of PFOs. Such PFOs portray a high enough risk for clinical events, the likes of death, stroke, myocardial infarction, or ocular, visceral, and peripheral embolism, to justify screening for them. Highly significant health incidents being at stake, it appears obvious that PFO closure should be used for primary prevention. This is supported by the fact that closing a PFO is the simplest intervention in cardiology, with presumably the highest clinical yield. Being mainly a preventive measure, PFO closure represents a mechanical vaccination. When closing PFOs for one of the rarer therapeutic indications (migraine, platypnea orthodeoxia, etc.), patients automatically profit from the collateral benefit of getting at the same time mechanically vaccinated for life against paradoxical embolism. Vice versa, closing a PFO for prevention of paradoxical embolism not infrequently betters or cures migraine or exercise dyspnea, thereby improving quality of life as a collateral benefit.

In this paper, we study the effect of parasitic channel on electrical characteristics and power consumptions of vertically stacked gate-all-around (GAA) silicon nanosheet (NS) MOSFETs of the bulk and silicon-on-insulator (SOI) substrates. Through deliberate control of the bottom parasitic channel coverage, we systematically assess its influence on DC, AC, and RF characteristics including power consumption. The observed findings highlight a significant differentiation among the bottom parasitic channels: GAA (i.e., control sample with 100% coverage), omega-shaped gate NS (70% and 80% coverages), and FinFET (60% coverage). Compared with the device with a 60% coverage channel, the device with a 100% coverage channel possesses 3520% and 8030% normalized leakage current improvement for both NFET and PFET under the bulk substrate, respectively. Compared with bulk-substrate devices, the SOI-substrate devices further significantly improve the leakage current. Due to enhanced off-state current leakages in the 100% covered bulk-substrate device, the static power demonstrates a notable improvement (about 98.1%), compared to 60% covered devices. Hence, the utilization of a 60% covered channel will result in a degradation of both device and circuit performance. The observation of GAA NS MOSFET indicates that an increase in the bottom parasitic channel coverage ratio leads to a positive impact on power consumption and leakage currents. The examination presented here is useful in the fabrication of stacked GAA NS MOSFETs.

Smart grid software interconnects multiple Engineering disciplines (power systems, communication, software and hardware technology, instrumentation, big data, etc.). The software architecture is an evolving concept in smart grid systems in which systematic architecture development is a challenging process. The architecture has to realize the complex legacy power grid systems and cope up with current Information and Communication Technologies (ICT). The distributed generation in smart grid environment expects the software architecture to be distributed and to enable local control. Smart grid architecture should also be modular, flexible and adaptable to technology upgrades. In this paper, the authors have made a comprehensive review on architecture for smart grids. An in depth analysis of layered and agent based architectures is presented and compared under various domains.